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參數(shù)資料
| 型號(hào)： | LV1605M |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 14 X 14 MM, QIP-64 |
| 文件頁數(shù)： | 20/24頁 |
| 文件大小： | 262K |
| 代理商： | LV1605M |
No. 7809-5/24
LV1605M
Pin No.
Pin name
I/O
Description
1
FIN2
I
Pickup photodiode connection. The RF signal is generated by adding to the FIN1 pin, and the FE signal is generated by subtracting.
2
FIN1
I
Pickup photodiode connection
3
E
I
Pickup photodiode connection. The TE signal is generated by subtraction with the F pin.
4
F
I
Pickup photodiode connection
5
TB
I
TE signal DC component input
6
TE–
The TE signal gain is set by connecting a resistor between this pin and the TE pin.
7
TE
O
TE signal output
8
TESI
I
TES (tracking error sense) comparator input. Apply a bandpass filter to the TE signal and input the result to this pin.
9
SCI
I
Shock detection input
10
TH
Tracking gain time constant setting
11
TA
TA amplifier output
12
TD–
Used for the tracking phase compensation constant formed between the TD and VR pins.
13
TD
I
Tracking phase compensation constant connection
14
JP
Tracking jump signal (kick pulse) amplitude setting
15
TO
O
Tracking control signal output
16
FD
O
Focusing control signal output
17
FD–
Used for the focusing phase compensation constant formed between the FD and FA pins.
18
FA
Used for the focusing phase compensation constant formed between the FD- and FA- pins.
19
FA–
Used for the focusing phase compensation constant formed between the FA and FE pins.
20
FHO
Focus gain time constant setting
21
FE
O
FE signal output
22
FE–
The FE signal gain is set by connecting a resistor between this pin and the FE pin.
23
FH
Focus gain time constant setting
24
SP
O
CLV input signal single-end output
25
SPG
Spindle 12 cm mode gain setting resistor connection
26
SP–
Used for the spindle phase compensation constant in conjunction with the SPD pin.
27
SPD
O
Spindle control signal output
28
SLEQ
Sled phase compensation constant setting
29
SLD
O
Sled control signal output
30
SL–
I
Input for the sled advance signal from the microcontroller.
31
SL+
I
Input for the sled advance signal from the microcontroller.
32
DVCC
Digital system VCC
33
DGND
Digital system ground
34
TGL
I
Input for tracking gain control signal from the DSP. The gain is low when TGL is high.
35
TOFF
I
Input for tracking gain control signal from the DSP. The gain is off when TOFF is high.
36
TES
O
Outputs for the TES signal to the DSP.
37
TJP
I
Input for the tracking jump signal from the DSP
38
HFL
O
The high frequency level (HFL) signal is used to judge whether the position of the main beam is over a pit or over a mirror area.
39
CLV
I
CLV error signal from the DSP
40
INTI
I
Forced defect detected state signal input
41
CL
I
Microcontroller command clock input
42
DAT
I
Microcontroller command data input
43
CE
I
Microcontroller command chip enable input
44
RW
I
Gain switching input. RW=high: CD mode, RW=low: CD-RW mode.
45
CLK
I
Reference clock input. The DSP 130kHz clock signal is input to this pin.
46
DEF
O
Disc defect detection output
47
DRF
O
Defect RF: RF level detection output
48
RFSM
O
RF output
49
RF–
In conjunction with the RFSM pin, sets the RF gain and is used for the EFM signal 3T compensation constant setting.
50
PH1
RF signal peak hold capacitor connection
51
AVCC
Analog system VCC.
52
NC
NC (no connection)
53
FAJON
I
Focus offset adjustment mode switching. FAJON=low: normal mode, FAJON=high: constant voltage FD mode.
54
FSS
I
Focus search select (FSS): focus search mode (± or + search relative to the reference voltage) switching.
55
PON
I
Power On. PON=high: active mode, PON=low: sleep mode
56
LF2
Disc defect detection time constant setting
57
AGND
Analog system ground
58
FSC
Focus search smoothing capacitor connection
59
BH1
RF signal bottom hold capacitor connection
60
REFI
Reference voltage bypass capacitor connection
61
VR
O
Reference voltage output
62
LDD
O
APC circuit output
63
LDS
I
APC circuit input
64
TC
Tracking signal peak hold capacitor connection
Pin Functions
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