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參數(shù)資料
| 型號： | LV1110NM |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 0.80 MM PITCH, QFP-64 |
| 文件頁數(shù)： | 4/22頁 |
| 文件大?。?/td> | 351K |
| 代理商： | LV1110NM |
No. 6094-12/22
LV1110NM
REC OUT input switching
L
H
D9
Function output
Mixer output
REC OUT on/off
Notes on control data
The device latches the individual data bits of the command at the rising edge of the clock signal.
One frame consists of 16 bits (A to D13).
The device latches the data for the command at the rising edge of the enable signal.
Maintain the clock and enable signals at High level when not controlling the LV1110NM.
Maintain the enable signal at High level for at least 10 s between commands.
min. 10 s
Important note on mode control and using system muting
When the power is first applied, allow the IC sufficient time to initialize (approximately 2 seconds) and then send it
commands to turn system muting off and then on.
When changing the delay, always turn system muting on and then off—that is, send the new data with the command to
turn system muting on and again with the command to turn it back off.
Both operations enhance reliability by forcing the device to initialize its memory.
Data timing
L
H
D10
OFF
ON
D11
OFF
ON
Parameter
Symbol
Ratings
Unit
min
typ
max
Enable-to-clock delay
tec
5
s
Data-to-clock delay
tdc
5
s
Clock high-level hold time
tch
5
s
Clock high-level hold time
tcl
5
s
Clock period
tck
10
s
Timing Characteristic
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