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參數資料
| 型號： | LUCW3000CCN |
| 英文描述： | W3000 PLL Dual-Band Frequency Synthesizer |
| 中文描述： | W3000鎖相環(huán)雙頻段頻率合成器 |
| 文件頁數： | 17/28頁 |
| 文件大?。?/td> | 327K |
| 代理商： | LUCW3000CCN |
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Advance Data Sheet
December 1999
W3000 PLL Dual-Band Frequency Synthesizer
Lucent Technologies Inc.
17
PLL Lock-Detect Function
The W3000 provides a basic lock-detect function for fault finding or for system specification requirements.
Inside the W3000, the length of the up or down pulses applied to the loop filter is compared with a reference
clock period. If the current pulses are shorter than a reference clock period for 15 consecutive comparison
periods, the LD line is asserted. If a current pulse is detected that is longer than a reference clock period, the LD
line is unset.
The LD line gives a signal to indicate a PLL fault condition. It does not provide a true loop-locked output. For
example, in a GSM system with a reference clock of 13 MHz and a comparison frequency of 200 kHz, the
current pulses only have to be less than 1/65 of a cycle for 15 consecutive times for the LD line to be asserted.
This equates to ~0.4o of phase. In the worst case, if the phase stays inside this limit, moving from one extreme to
the other, the frequency will only be within 0.2%, i.e., 4 MHz on a 2 GHz VCO.
The LD output from the W3000 is a standard logic signal and requires no external comparison or R-C filters.
Typical Performance Characteristics
UHF
SOURCE
0.047 μF
100 pF
+V
DDC
100 pF
+V
DD
μC
REFERENCE
SOURCE
0.01 μF
10 MHz REF
442
CURRENT
METER
V
DDC
/2
50
6.8 pF
50
LAT
DAT
CLK
PWRDN
REF_IN
LOCK DET
RES
V
DDC
CPOUT
V
SS
1
V
SS
2
MAIN_IN
V
DD
2
V
DD
1
RREF = 18 k
V
DDC
Figure 8. MAIN_IN and REF_IN Sensitivity Test Circuit Diagram
MAIN_IN and REF_IN are set to cause a small beat frequency at the phase detector input. This generates a
sawtooth signal at the charge pump output of known slope. The amplitude of the UHF source is decreased. The
sensitivity limit is reached when the slope of this waveform deviates from the calculated value. This is then
repeated for the reference source.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LUCW3000CCN-TR | 制造商:AGERE 制造商全稱:AGERE 功能描述:W3000 PLL Dual-Band Frequency Synthesizer |
| LUCW3011FCL | 制造商:AGERE 制造商全稱:AGERE 功能描述:1 GHz Quadrature Modulator |
| LUCW3020CCS | 制造商:AGERE 制造商全稱:AGERE 功能描述:GSM Multiband RF Transceiver |
| LUCW3020CCS-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:GSM Multiband RF Transceiver |
| LUCW3030ACA | 制造商:AGERE 制造商全稱:AGERE 功能描述:W3030 3 V Dual-Mode IF Cellular Receiver |
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