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參數(shù)資料
| 型號(hào)： | LUCW3000CCN-TR |
| 英文描述： | W3000 PLL Dual-Band Frequency Synthesizer |
| 中文描述： | W3000鎖相環(huán)雙頻段頻率合成器 |
| 文件頁數(shù)： | 10/28頁 |
| 文件大?。?/td> | 327K |
| 代理商： | LUCW3000CCN-TR |
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Advance Data Sheet
December 1999
W3000 PLL Dual-Band Frequency Synthesizer
Lucent Technologies Inc.
10
Functional Descriptions
The W3000 contains a reference register (REF) and a
main register (MAIN). The REF register is used for
programming the division ratio of the reference clock
and for initial setup of the operation modes. The MAIN
register is intended for programming that can occur
frequently, e.g., dynamic channel switching and
putting the W3000 into power-saving mode.
SHIFT REGISTER
ADDRESS
DECODER
LAT
DAT
CLK
MAIN
REF
Figure 6. Register Programming Diagram
Both REF and MAIN registers are programmed
separately, each with a 24-bit data sequence. The last
bit is that which immediately precedes a low-to-high
latch input transition occurring while the CLOCK input
is low. Bit 24 is loaded first, and bit 1 is loaded last.
The last bit in the serial sequence is C0. This bit is
used to direct the 24-bit sequence to the MAIN or REF
registers.
Table 6. C0:C1: MAIN and REF Register
Addressing
(Destination of Serial Data)
(Bits 1 and 24)
C1
0
0
1
1
C0
0
1
0
1
Addressed Register
MAIN
REF
Secondary Address
Secondary Address
The first bit, C1, allows the W3000 to share the serial
bus. When C1 is a logic high, the W3000 ignores the
data sent on the serial bus.
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