- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367614 > LUCL9500 High-Voltage Ringing SLIC for VolP Applications PDF資料下載
參數(shù)資料
| 型號： | LUCL9500 |
| 英文描述： | High-Voltage Ringing SLIC for VolP Applications |
| 中文描述： | 高壓振鈴用戶接口應(yīng)用的福爾普 |
| 文件頁數(shù)： | 24/32頁 |
| 文件大小： | 616K |
| 代理商： | LUCL9500 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當(dāng)前第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
Preliminary Data Sheet
September 2001
High-Voltage Ringing SLIC for VoIP Applications
L9500A
24
Agere Systems Inc.
Applications
(continued)
Power Ring
The device offers a ring mode, in which a balanced
power ring signal is provided to the tip/ring pair. During
the ring mode, a user-supplied low-voltage ring signal
is input to the device’s RING
IN
input. This signal is
amplified to produce the balanced power ring signal.
The user may supply a sine wave input, PWM input, or
a square wave to produce sinusoidal or trapezoidal
ringing at tip and ring.
Various crest factors are shown below for illustrative
purposes.
12-3346a (F)
Note: Slew rate = 5.65 V/ms; trise = tfall = 23 ms; pwidth = 2 ms;
period = 50 ms.
Figure 9. Ringing Waveform Crest Factor = 1.6
12-3347a (F)
Note: Slew rate = 10.83 V/ms; trise = tfall = 12 ms; pwidth = 13 ms;
period = 50 ms.
Figure 10. Ringing Waveform Crest Factor = 1.2
Sine Wave Input Signal and Sine Wave Power Ring
Signal Output
The low-voltage sine wave input is applied differentially
or single ended to the L9500 at pins RING
INP
and
RING
INN
. During the ring mode, the signals at pins
RING
INP
and RING
INN
are amplified and presented to
the subscriber loop. The differential gain from RING
IN
to tip and ring is a nominal 70.
When the device enters the ring mode, the tip/ring
overhead set at OVH and the scan clamp circuit are
disabled, allowing the voltage magnitude of the power
ring signal to be maximized. Additionally, in the ring
mode, the loop current limit is increased 2.5X the value
set by the V
PROG
voltage.
The magnitude of the power ring voltage will be a func-
tion of the gain of the ring amplifier, the high-voltage
battery, and the input signal at RING
IN
. The input range
of the signal at RING
IN
is 0 V to Vcc. As the input volt-
age at RING
IN
is increased, the magnitude of the power
ring voltage at tip and ring will increase linearly, per the
gain of 70, until the tip and ring drive amplifiers begin to
saturate. Once the tip and ring amplifiers reach satura-
tion, further increases of the input signal will cause clip-
ping distortion of the power ring signal at tip and ring.
The ring signal will appear balanced on tip and ring.
That is, the power ring signal is applied to both tip and
ring, with the signal on tip 180
°
out of phase from the
signal on ring.
It is recommended that the input level at RING
IN
be
adjusted so that the power ring signal at tip and ring is
just at the edge or slightly clipping. This gives maxi-
mum power transfer with minimal distortion of the sine
wave. The tip side will saturate at a nominal 1 V above
ground. The ring side will saturate at a nominal 3 V
above battery. The input circuit for a sine wave along
with waveforms to illustrate the tip and ring saturation
is shown in Figure 9.
The point at which clipping of the power ring signal
begins at tip and ring is a function of the battery volt-
age, the input capacitor at RING
IN
, and the input signal
at RING
IN
and Vcc. During nonring modes, the sinusoi-
dal ringing waveform may be left on at RING
IN
. Via the
state table, the ring signal will be removed from tip and
ring even if the low-voltage input is still present at
RING
IN
.
TIME (s)
–80
–60
–40
–20
0
20
40
60
80
0.00
0.02 0.06
0.04 0.08
0.10
0.12
0.14
0.16
0.18
0.20
V
TIME (s)
–80
–60
–40
–20
0
20
40
60
80
0.00
0.02 0.06
0.04 0.08
0.10
0.12
0.14
0.16
0.18
0.20
V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LUCL9500ARG-D | High-Voltage Ringing SLIC for VolP Applications |
| LUCL9500AGF-D | High-Voltage Ringing SLIC for VolP Applications |
| LUCL9500AGF-DT | High-Voltage Ringing SLIC for VolP Applications |
| LUCW3000CCN | W3000 PLL Dual-Band Frequency Synthesizer |
| LUCW3000CCN-TR | W3000 PLL Dual-Band Frequency Synthesizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LUCL9500AGF-D | 制造商:AGERE 制造商全稱:AGERE 功能描述:High-Voltage Ringing SLIC for VolP Applications |
| LUCL9500AGF-DT | 制造商:AGERE 制造商全稱:AGERE 功能描述:High-Voltage Ringing SLIC for VolP Applications |
| LUCL9500ARG-D | 制造商:AGERE 制造商全稱:AGERE 功能描述:High-Voltage Ringing SLIC for VolP Applications |
| LUCLX6B | 制造商:Schneider Electric 功能描述:Magnetic Control unit,24Vac,0.6A |
| LUCLX6BL | 制造商:Schneider Electric 功能描述:Magnetic Control Unit,24Vdc,0.6A |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。