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參數(shù)資料
| 型號： | LUCL9217GAR-D |
| 英文描述： | Aluminum Snap-In Capacitor; Capacitance: 10000uF; Voltage: 25V; Case Size: 25x30 mm; Packaging: Bulk |
| 中文描述： | 低成本線接口，具有反向電池和PPM |
| 文件頁數(shù)： | 12/30頁 |
| 文件大小： | 414K |
| 代理商： | LUCL9217GAR-D |
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12
Agere Systems Inc.
Data Sheet
November 2001
with Reverse Battery and PPM
L9217A/G Low-Cost Line Interface
Electrical Characteristics
(continued)
Table 9. Logic Inputs and Outputs
All outputs are open collectors with internal, 30 k
pull-up resistor. Input pins have internal pull-down or some
method to power up in the disconnect state.
Ring Trip Requirements
I
Ringing signal:
— Voltage, minimum 35 Vrms, maximum 100 Vrms.
— Frequency, 17 Hz to 33 Hz.
— Crest factor, 1.2 to 1.6.
I
Ring trip:
—
≤
100 ms (typical).
I
Pretrip:
— The circuits in Figure 3 will not cause ring trip.
Figure 3. Ring Trip Circuits
Parameter
Symbol
Min
Typ
Max
Unit
Input Voltages:
Low Level (permissible range)
High Level (permissible range)
V
IL
V
IH
–0.5
2.0
0.4
2.4
0.7
V
CC
V
V
Input Currents:
Low Level (V
CC
= 5.25 V, V
I
= 0.4 V)
High Level (V
CC
= 5.25 V, V
I
= 2.4 V)
I
IL
I
IH
0
10
4
24
10
50
μ
A
μ
A
Output Voltages (open collector with internal pull-up resistor):
Low Level (V
CC
= 4.75 V, I
OL
= 200
μ
A)
High Level (V
CC
= 4.75 V, I
OH
= –20
μ
A)
V
OL
V
OH
0
2.4
0.2
—
0.4
V
CC
V
V
RING
RING
100
10 k
TIP
TIP
2
μ
F
8
μ
F
12-2572 (F).f
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LUCL9217GAR-DT | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface with Reverse Battery and PPM |
| LUCL9218AAR-D | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface |
| LUCL9218AAR-DT | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface |
| LUCL9218GAR-D | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface |
| LUCL9218GAR-DT | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface |
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