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參數(shù)資料
| 型號： | LUCL7585GBE-D |
| 英文描述： | Full-Feature,Low-Power SLIC and Switch |
| 中文描述： | 全功能，低功耗SLIC和開關(guān) |
| 文件頁數(shù)： | 5/22頁 |
| 文件大?。?/td> | 446K |
| 代理商： | LUCL7585GBE-D |
Agere Communications Inc.
5
Data Sheet
September 2001
L7585G Full-Feature, Low-Power SLIC and Switch
Pin Information
(continued)
Table 1. Pin Descriptions
Note: On the printed-wiring board (PWB), make the leads to BGND and V
BAT
as wide as possible for thermal and electrical reasons. Also, max-
imize the amount of PWB copper on all leads connected to this device for the lowest operating temperature.
Pin
1
2
Symbol
CF1
FB2
Type
I/O
I
Name/Function
Filter Capacitor 1.
Connect a 0.22 μF, 100 V capacitor from this pin to pin CF2.
Forward Battery Slowdown 2.
A capacitor from FB1 to AGND and from FB2 to AGND
will ramp the polarity reversal transition when quiet polarity reversal is required. If not
needed, the pin can be left open.
Forward Battery Slowdown 1.
A capacitor from FB1 to AGND and from FB2 to AGND
will ramp the polarity reversal transition when quiet polarity reversal is required. If not
needed, the pin can be left open.
Battery Ground.
Ground return for the battery (V
BAT
) supply.
Battery Supply.
Negative high-voltage power supply.
Battery Supply.
Negative high-voltage power supply.
+10 V Supply.
+10 V bias supply for switch circuitry.
Not Channel Select.
A low-to-high transition on this logic input stores the data on pins
B0—B5 into the input latches on the SLIC. When NCS is either high or low, the SLIC is
unaffected by data on pins B0—B5.
Clock.
Clock input.
Not Detect.
When low, this logic output indicates either a ring trip or an off-hook condition,
depending on the input state of the SLIC. If either the BCDMOS portion or CBIC portion
of this device enters thermal shutdown, NDET will be forced low.
Digital Ground.
Ground return for V
CCD
and relay driver flyback current.
Relay Driver.
This output drives an external relay. RDO is low (relay operated) when a
low input on B5 is latched into the SLIC.
Ring Trip Sense.
Sense input for the ring trip detector.
Ring Lead Ringing Access Switch.
Ringing relay connects this pin to pin RRNG. Con-
nect this pin to pin PR through a 500
current-limiting resistor.
Ring Lead Ringing Supply.
Connect this pin to the ringing supply.
Protected Ring.
The output of the ring driver and input to the transmit current sense cir-
cuit. Connect to the ring of the loop through overvoltage protection.
Ring Lead Test-In.
Test-in relay connects this pin to PR. Connect RTI to the ring lead of
the test-in bus.
Tip Lead Test-In.
Test-in relay connects this pin to PT. Connect TTI to the tip lead of the
test-in bus.
Protected Tip.
The output of the tip driver and input to the transmit current sense circuit.
Connect to the tip of the loop through overvoltage protection.
Tip Lead Ringing Supply.
Ringing relay connects this pin to PT. Connect TRNG to the
ringing supply return.
Bit 5.
B0—B5 determine the state of the SLIC. See Operating States.
3
FB1
I
4
5
6
7
8
BGND
V
BAT
V
BAT
V
SP
NCS
—
—
—
—
I
9
10
CLK
NDET
I
O
11
12
DGND
RDO
—
O
13
14
RTS
RSW
I
O
15
16
RRNG
PR
I
I/O
17
RTI
I
18
TTI
I
19
PT
I/O
20
TRNG
O
21
B5
I
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