參數(shù)資料
型號(hào)： LTC6992IDCB-4#PBF
廠商： LINEAR TECHNOLOGY CORP
元件分類(lèi)： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, PDSO6
封裝： 2 X 3 MM, LEAD FREE, PLASTIC, MO-229, DFN-6
文件頁(yè)數(shù)： 4/32頁(yè)
文件大?。?/td> 373K
代理商： LTC6992IDCB-4#PBF
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
12
69921234f
PIN FUNCTIONS
V+ (Pin 1/Pin 5): Supply Voltage (2.25V to 5.5V). This sup-
ply should be kept free from noise and ripple. It should be
bypassed directly to the GND pin with a 0.1μF capacitor.
DIV (Pin 2/Pin 4): Programmable Divider and Polarity
Input. The DIV pin voltage (VDIV) is internally converted
into a 4-bit result (DIVCODE). VDIV may be generated by
a resistor divider between V+ and GND. Use 1% resistors
to ensure an accurate result. The DIV pin and resistors
should be shielded from the OUT pin or any other traces
that have fast edges. Limit the capacitance on the DIV
pin to less than 100pF so that VDIV settles quickly. The
MSB of DIVCODE (POL) determines if the PWM signal
is inverted before driving the output. When POL = 1 the
transfer function is inverted (duty cycle decreasing as
VMOD increases).
SET (Pin 3/Pin 3): Frequency-Setting Input. The voltage
on the SET pin (VSET) is regulated to 1V above GND. The
amount of current sourced from the SET pin (ISET) pro-
grams the master oscillator frequency. The ISET current
range is 1.25μA to 20μA. The output oscillation will stop
if ISET drops below approximately 500nA. A resistor con-
nected between SET and GND is the most accurate way to
set the frequency. For best performance, use a precision
metal or thin film resistor of 0.5% or better tolerance and
50ppm/°C or better temperature coefficient. For lower ac-
curacy applications an inexpensive 1% thick film resistor
may be used.
Limit the capacitance on the SET pin to less than 10pF
to minimize jitter and ensure stability. Capacitance less
than 100pF maintains the stability of the feedback circuit
regulating the VSET voltage.
(DCB/S6)
TYPICAL PERFORMANCE CHARACTERISTICS
Typical Start-Up, POL = 0
Typical Start-Up, POL = 1
V+
1V/DIV
OUT
1V/DIV
V+ = 2.5V
DIVCODE = 3 (÷64)
RSET = 50k
VMOD = 0.3V (~25% DUTY CYCLE)
100μs/DIV
6992 G53
500μs
V+
1V/DIV
OUT
1V/DIV
V+ = 2.5V
DIVCODE = 12 (÷64, POL = 1)
RSET = 50k
VMOD = 0.2V (~87.5% DUTY CYCLE)
100μs/DIV
6992 G54
500μs
6992 PF
LTC6992
MOD
GND
SET
OUT
V+
DIV
C1
0.1μF
RSET
R2
R1
V+
V+ = 3.3V, RSET = 200k, and TA = 25°C, unless
otherwise noted.
125kHz Full Modulation
VMOD
0.5V/DIV
OUT
1V/DIV
V+ = 3.3V
DIVCODE = 1
RSET = 100k
50μs/DIV
6992 G55
LTC6992-1
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參數(shù)描述
LTC6992IDCB6-1-PBF 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM)
LTC6992IDCB6-1-TRPBF 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM)
LTC6992IDCB6-2-PBF 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM)
LTC6992IDCB6-2-TRPBF 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM)
LTC6992IDCB6-3-PBF 制造商:LINER 制造商全稱(chēng):Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM)
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