參數(shù)資料
型號(hào)： LTC693
廠商： Linear Technology Corporation
英文描述： Microprocessor Supervisory Circuits(μP監(jiān)控電路)
中文描述： 微處理器監(jiān)控電路（微處理器監(jiān)控電路）
文件頁(yè)數(shù)： 13/16頁(yè)
文件大?。?/td> 261K
代理商： LTC693
13
LTC692/LTC693
Figure 12. Oscillator Configurations
U
S
A
O
PPLICATI
U
U
The LTC693 provides an additional output (Watchdog
Output, WDO) which goes low if the watchdog timer is
allowed to time out and remains low until set high by the
next transition on the WDI pin. WDO is also set high when
V
CC
falls below the reset voltage threshold or V
BATT
.
The LTC693 has two additonal pins OSC SEL and OSC IN,
which allow reset active time and watchdog time-out
period to be adjusted per Table 2. Several configurations
are shown in Figure 12.
OSC IN can be driven by an external clock signal or an
external capacitor can be connected between OSC IN and
GND when OSC SEL is forced low. In these configurations,
the nominal reset active time and watchdog time-out
period are determined by the number of clocks or set by
the formula in Table 2. When OSC SEL is high or floating,
the internal oscillator is enabled and the reset active time
is fixed at 140ms minimum. OSC IN selects between the
1 second and 70ms minimum normal watchdog time-out
periods. In both cases, the time-out period immediately
after a reset is at least 1 second.
Figure 11. Watchdog Time-out Period and Reset Active Time
t1 = RESET ACTIVE TIME
t2 = NORMAL WATCHDOG TIME-OUT PERIOD
t3 = WATCHDOG TIME-OUT PERIOD IMMEDIATELY
AFTER A RESET
V
CC
= 5V
WDI
t2
t3
t1
t1
WDO
RESET
LTC692/3 F11
EXTERNAL CLOCK
INTERNAL OSCILLATOR
1.6 SECOND WATCHDOG
INTERNAL OSCILLATOR
100ms WATCHDOG
EXTERNAL OSCILLATOR
GND
GND
GND
GND
V
CC
V
CC
V
CC
OSC SEL
OSC SEL
OSC SEL
OSC SEL
OSC IN
OSC IN
OSC IN
OSC IN
3
3
3
3
4
4
4
4
8
8
8
8
7
7
7
7
V
CC
FLOATING
OR HIGH
FLOATING
OR HIGH
LTC693
FLOATING
OR HIGH
LTC693
LTC693
LTC693
LTC692/3 F12
5V
5V
5V
5V
相關(guān)PDF資料
PDF描述
LTC694-3.3 3.3V Microprocessor Supervisory Circuits(3.3VμP監(jiān)控電路)
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