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參數(shù)資料
| 型號： | LTC691 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Microprocessor Supervisory Circuits |
| 中文描述： | 微處理器監(jiān)控電路 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大小： | 141K |
| 代理商： | LTC691 |
13
LTC 690/LTC 691
LTC 694/LTC 695
Figure 12. Oscillator Configurations
U
S
A
The LTC691 and LTC695 provide an additional output
(Watchdog Output, WDO) which goes low if the watchdog
timer is allowed to time out and remains low until set high
by the next transition on the WDI pin. WDO is also set high
when V
CC
falls below the reset voltage threshold or V
BATT
.
The LTC691 and LTC695 have two additonal pins OSC SEL
and OSC IN, which allow reset active time and watchdog
time-out period to be adjusted per Table 2. Several con-
figurations are shown in Figure 12.
O
PPLICATI
W
U
I FOR ATIO
U
OSC IN can be driven by an external clock signal or an
external capacitor can be connected between OSC IN and
GND when OSC SEL is forced low. In these configurations,
the nominal reset active time and watchdog time-out
period are determined by the number of clocks or set by
the formula in Table 2. When OSC SEL is high or floating,
the internal oscillator is enabled and the reset active time
is fixed at 35ms minimum for the LTC691 and 140ms
minimum for the LTC695. OSC IN selectes between the 1
second and 70ms minimum normal watchdog time-out
periods. In both cases, the time-out period immediately
after a reset is at least 1 second.
Figure 11. Watchdog Time-Out Period and Reset Active Time
t
1
= RESET ACTIVE TIME
t
2
= NORMAL WATCHDOG TIME-OUT PERIOD
t
= WATCHDOG TIME-OUT PERIOD IMMEDIATELY
AFTER A RESET
V
CC
= 5V
WDI
t
2
t
3
t
1
t
1
WDO
RESET
690 F11
EXTERNAL CLOCK
INTERNAL OSCILLATOR
1.6 SECOND WATCHDOG
INTERNAL OSCILLATOR
100ms WATCHDOG
EXTERNAL OSCILLATOR
GND
GND
GND
GND
V
CC
V
CC
V
CC
OSC SEL
OSC SEL
OSC SEL
OSC SEL
OSC IN
OSC IN
OSC IN
OSC IN
3
3
3
3
4
4
4
4
8
8
8
8
7
7
7
7
V
CC
FLOATING
OR HIGH
FLOATING
OR HIGH
LTC691
LTC695
FLOATING
OR HIGH
LTC691
LTC695
LTC691
LTC695
LTC691
LTC695
690 F12
5V
5V
5V
5V
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