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參數(shù)資料
| 型號： | LTC6909IMS#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 8/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OSC SILICON 6.67MHZ 16-MSOP |
| 產(chǎn)品目錄繪圖： | 16-MSOP |
| 標(biāo)準(zhǔn)包裝： | 37 |
| 類型： | 振蕩器 - 硅 |
| 頻率： | 12.5kHz ~ 6.67MHz |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電流 - 電源： | 2.4mA |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 16-TFSOP（0.118"，3.00mm 寬） |
| 包裝： | 管件 |
| 供應(yīng)商設(shè)備封裝： | 16-MSOP |
| 安裝類型： | 表面貼裝 |
| 產(chǎn)品目錄頁面： | 1715 (CN2011-ZH PDF) |
LTC6909
16
6909fa
ApplicAtions inForMAtion
high impedance) and 001 (all outputs are low) are useful
for controlling the clocking of switching regulators during
start-up. At start-up, most switching regulators ignore the
clock input until a power good state is achieved. Nearly
all of Linear Technology’s switching regulators operate in
this manner. However, some switching regulators from
other vendors do not ignore the clock input on start-up
and yet are not synchronizable until the power good state
is reached. Attempting to synchronize these switching
regulators before they reach the power good state can
lead to problems. For these switching regulators it is best
to have the LTC6909 held in the PH0-PH1-PH2 codes
000 or 001 until the switching regulator issues a power
good signal. In most cases, simply connecting a switch-
ing regulator’s power good signal to the PH0, PH1 and/
or PH2 pins accomplishes this. At most, an additional
single logic inverter is required to switch from either the
000 or 001 states to any of the other six states through
a power good signal.
Another way to use the PH0, PH1 and PH2 inputs to as-
sist with power-up/down issues is to use an external part
to provide a supply monitor or an undervoltage lockout
(UVLO). There are several parts available that combine a
comparator with a reference to fulfill this function. The
LTC6909 does not have its own internal UVLO. If the
supply is below 2.7V, frequency accuracy may suffer. At
a supply voltage around 2V or lower, the LTC6909 will
operate erratically or will stop. It may stop randomly in a
logic high or low state.
Figure 8 shows a circuit using an LTC1998 to monitor the
supply voltage and control the logic state of the PH0 and
PH1 pins. The LTC1998’s threshold is set at 2.5V with
50mV of hysteresis. On power-up, as the supply ramps
up, the LTC1998 holds PH0 and PH1 low, keeping the
LTC6909’s outputs in a high impedance state. Once the
supply is above 2.55V, the LTC1998 pulls the PH0 and PH1
pins high, setting the LTC6909 into the 4-phase operating
mode. On power-down, the supply ramps down and the
LTC1998’soutputgoeslowoncethesupplyisbelow2.45V.
This puts the LTC6909’s outputs in the high impedance
state. All switch overs are synchronized to the LTC6909’s
internal oscillator to avoid glitches and runt pulses.
To adjust the on/off supply voltage threshold, change the
configuration of the LTC1998. As with the power good
signal,atmostanadditionalsinglelogicinverterisrequired
to switch from either the 000 or 001 states to any of the
other six states.
Figure 8. Adding a UVLO Feature to the LTC6909. In This Example, the LTC6909 Is in 4-Phase Mode
for a V+ > ≈2.5V (PHx = 011) and the Outputs Are All High Impedance for V+ < ≈2.5V (PHx = 000)
LTC1998
V+
BATT
GND
VTHA
953k
49.9k
6909 F08
RSET
6
5
4
BATTLO
VLOGIC
VHA
0.1F
1
2
3
LTC6909
V+A
GND
PH0
PH1
OUT1
OUT2
OUT3
OUT4
16
15
14
13
12
11
10
9
SET
PH2
MOD
V+D
OUT8
OUT7
OUT6
OUT5
1
2
3
4
5
6
7
8
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