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參數(shù)資料
| 型號(hào)： | LTC6907CS6#TRMPBF |
| 廠商： | Linear Technology |
| 文件頁(yè)數(shù)： | 12/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OSC SILICON 4MHZ TSOT23-6 |
| 產(chǎn)品目錄繪圖： | LTC690(6,7)CS6#TRMPBF Top |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類(lèi)型： | 振蕩器 - 硅 |
| 頻率： | 40kHz ~ 4MHz |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 305µA |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | SOT-23-6 細(xì)型，TSOT-23-6 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 供應(yīng)商設(shè)備封裝： | TSOT-23-6 |
| 安裝類(lèi)型： | 表面貼裝 |
| 產(chǎn)品目錄頁(yè)面： | 1715 (CN2011-ZH PDF) |
| 其它名稱(chēng)： | LTC6907CS6#TRMPBFDKR |
LTC6907
9
6907fa
OUTPUT FREQUENCY (kHz)
10
SUPPLY
CURRENT
(
A)
100
6907 F09
10
1000
10000
100
1000
CLOAD = 5pF
T = 25
°C
3.3V, –10
:
3.3V, –3
:
3.3V, –1
:
APPLICATIO S I FOR ATIO
WU
UU
Power Supply Rejection
The LTC6907 has a very low supply voltage coefficient,
meaning that the output frequency is nearly insensitive to
the DC power supply voltage. In most cases, this error
term can be neglected.
High frequency noise on the power supply (V+) pin has the
potential to interfere with the LTC6907’s master oscillator.
Periodic noise, such as that generated by a switching
power supply, can shift the output frequency or increase
jitter. The risk increases when the fundamental frequency
or harmonics of the noise fall near the master oscillator
frequency. It is relatively easy to filter the LTC6907 power
supply because of the very low supply current. For ex-
ample, an RC filter with R = 160
and C = 10F provides
a 100Hz lowpass filter while dropping the supply voltage
only about 10mV.
Operating the LTC6907 with Supplies Higher
Than 3.6V
The LTC6907 may also be used with supply voltages
between 3.6V and 5.5V under very specific conditions. To
ensure proper functioning above 3.6V, a filter circuit must
be attached to the power supply and located within 1cm of
the device. A simple RC filter consisting of a 100
resistor
and 1
F capacitor (Figure 11) will ensure that supply
resonance at higher supply voltages does not induce
unpredictable oscillator behavior. Accuracy under higher
supplies may be estimated from the typical Frequency vs
Supply Voltage curves in the Typical Performance Charac-
teristics section of this data sheet.
Figure 9. Supply Current vs Frequency over DIV Settings
Figure 10. PC Board Layout with Guard Ring
LTC6907
RSET
OUT
GND
DIV
LEAKAGE
CURRENT
NO LEAKAGE
CURRENT
GUARD
RING
V+
GRD
SET
6907 F10
1
2
3
6
5
4
NO SOLDER MASK
OVER THE GUARD RING
layout that uses the GRD pin and a “guard ring” to absorb
leakage currents. The guard ring surrounds the SET pin
and the end of RSET to which it is connected. The guard ring
must have no solder mask covering it to be effective. The
GRD pin voltage is held within a few millivolts of the SET
pin voltage, so any leakage path between the SET pin and
the guard ring generates no leakage current.
Start-Up Time
When the LTC6907 is powered up, it holds the OUT pin
low. After the master oscillator has settled, the OUT pin is
enabled and the first output cycle is accurate. The time
from power-up to the first output transition is given
approximately by:
tSTART 64 tOSC + 100s
The digital divider ratio, N, does not affect the start-
up time.
V+
GND
DIV
OUT
GRD
SET
LTC6907
RSET
100
V+
3.6V TO 5.5V DC
1
F
6907 F11
Figure 11. Using the LTC6907 at Higher Supply Voltages
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