參數(shù)資料
型號: LTC6902IMS
廠商: LINEAR TECHNOLOGY CORP
元件分類: XO, clock
英文描述: Multiphase Oscillator with Spread Spectrum Frequency Modulation
中文描述: PLL FREQUENCY SYNTHESIZER, PDSO10
封裝: PLASTIC, MSOP-10
文件頁數(shù): 10/16頁
文件大?。?/td> 212K
代理商: LTC6902IMS
LTC6902
10
6902f
THEORY OF OPERATIOU
by 90 degrees, OUT3 lags OUT2 by 90 degrees and OUT4
lags OUT3 by 90 degrees. The signals are generated by
flip-flops. The output frequency is the programmable
divider’s output further divided 4 (M = 4).
The multiphase mode is determined by the state of the PH
input (Pin 3). Tie the PH pin to GND or drive it below 0.5V
to select the 2-phase mode. The PH pin may be floated or
driven to midsupply to select the 3-phase mode. The
4-phase mode is selected by tying the PH pin to V
+
or
driving it to within 0.4V of V
+
.
The CMOS output drivers have an ON resistance that is
typically less than 100
. In the
÷
1 (high frequency) mode,
the rise and fall times are typically 7ns with a 5V supply and
11ns with a 3V supply. These transition times maintain a
clean square wave at 10MHz (20MHz at 5V supply). In the
÷
10 and
÷
100 modes, where the output frequency is much
lower, slew rate control circuitry in the output driver in-
creases the rise/fall times to typically 14ns for a 5V supply
and 19ns for a 3V supply. The reduced slew rate lowers EMI
(electromagnetic interference) and supply bounce.
Spread Spectrum Frequency Modulation
The LTC6902 provides the additional feature of spread
spectrum frequency modulation (SSFM). The oscillator’s
frequency is modulated by a pseudorandom noise (PRN)
signal to spread the oscillator’s energy over a wide fre-
quency band. This spreading decreases the peak electro-
magnetic radiation levels and improves electromagnetic
compatibility (EMC) performance.
The amount of frequency spreading is determined by the
external resistor R
MOD
and the voltage between the V
+
and
MOD pins (V
+
– V
MOD
). Unlike the stationary SET
pin
voltage (V
SET
), the MOD pin voltage (V
MOD
) is a dynamic
signal generated by a multiplying digital to analog con-
verter (MDAC) referenced to V
SET
. Referencing to V
SET
negates errors due to variations of the V
SET
voltage and
locks the two voltages together. The V
MOD
voltage is the
V
SET
voltage scaled by one fifth and multiplied by the
digital code sent to the MDAC from the pseudorandom
binary sequence (PRBS) generator. V
MOD
varies in a
pseudorandom noise-like manner. The (V
+
– V
MOD
) volt-
age is 0V minimum and maximally one fifth (20%) of
(V
+
– V
SET
).
Referencing V
MOD
to V
SET
allows the ratio of R
SET
to
R
MOD
to determine the amount of frequency spreading.
Consider the case when R
SET
is equal to R
MOD
. Here,
when the (V
+
– V
MOD
) voltage is at its minimum of 0V,
I
MOD
= 0A, I
MASTER
= I
SET
and the master oscillator is at
its maximum frequency (f
MAX
) which is the f
OUT
fre-
quency set by the R
SET
resistor. Furthermore, when the
(V
+
– V
MOD
) voltage is at its maximum of 20% of (V
+
V
SET
), I
MOD
= 0.2 I
SET
, I
MASTER
= 0.8 I
SET
and the
master oscillator is at its minimum frequency (f
MIN
)
which is 80% of the f
OSC
frequency set by the R
SET
resistor. The general formula for the amount of frequency
spreading is below:
Frequency Spreading (in %) = 20R
SET
R
MOD
where frequency spreading is defined as:
Frequency Spreading (in %) = 100f
f
MAX
MAX
– f
MIN
The design procedure is to first choose the R
SET
resistor
value to set f
MAX
(f
OUT
) and then choose the R
MOD
resistor
value to set the amount of frequency spreading desired.
Note that the frequency is always modulated to a lower
value. This is often referred to as a down spread signal.
To disable the SSFM, connect the MOD pin to ground.
Grounding the MOD pin disables the modulation and shuts
down the modulation circuitry. While leaving the MOD pin
open, R
MOD
=
, gives a frequency spreading of 0%, this
is not a good method of disabling the modulation. The
open pin is susceptible to external noise coupling that can
affect the output frequency accuracy. Grounding the MOD
pin is the best way to disable the SSFM.
As stated previously the modulating waveform is a pseu-
dorandom noise-like waveform. The pseudorandom signal
is generated by a linear feedback shift register that is 9 bits
long. The pseudorandom sequence will repeat every 512
(2
9
) shift register clock cycles. The bottom seven bits of the
shift register are sent in parallel to the MDAC which pro-
duces the V
MOD
voltage. Being a digitally generated signal,
the output is not a perfectly smooth waveform but consists
of 128 (2
7
) discrete steps that change every shift register
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相關代理商/技術參數(shù)
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LTC6902IMSPBF 制造商:Linear Technology 功能描述:Multiphase Oscillator with SSFM MSOP10
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