ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full " />
參數(shù)資料
型號(hào)： LTC6602IUF#TRPBF
廠商： Linear Technology
文件頁數(shù)： 24/28頁
文件大?。?/td> 0K
描述： IC FILTER BANDPASS/LOWPASS 24QFN
標(biāo)準(zhǔn)包裝： 2,500
濾波器類型： 帶通
頻率 - 截止或中心： 300kHz
濾波器數(shù)： 2
濾波器階數(shù)： 5th
電源電壓： 2.7 V ~ 3.6 V
安裝類型： 表面貼裝
封裝/外殼： 24-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 24-QFN 裸露焊盤（4x4）
包裝： 帶卷 (TR)
LTC6602
5
6602fc
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+A = V+D = V+IN = 3V, VICM = VOCM = 1.5V, Gain = 0dB, lowpass cutoff =
300kHz, highpass cutoff = 45kHz, internal clocking with RBIAS = 54.9k unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Current,
Shutdown Mode
Sum of the Currents into V+D, V+A, and V+IN; All Supplies Set to 3V
Shutdown Via Serial Interface, Control Bit D1 = 1.
l
170
235
A
Supply Voltage
V+D, V+A Relative to GND
V+IN Relative to GND
l
2.7
3.6
5.5
V
PSR
V+D = V+A = V+IN, All from 2.7V to 3.6V
V+D = V+A = 3.0V, V+IN from 4.5V to 5.5V
l
50
80
60
95
dB
RBIAS Resistor Range
Clock Frequency Error ≤ ±3%, CLKCNTL = 3V
l
54.9
200
k
RBIAS Pin Voltage
54.9k < RBIAS < 200k
1.17
V
Clock Frequency Drift
Over Temperature
RBIAS = 54.9k, CLKCNTL Pin Open
40
ppm/C
Clock Frequency Change
Over Supply
V+A, V+D from 2.7V to 3.6V, RBIAS = 54.9k, CLKCNTL Pin Open
l
–0.6
0.1
0.6
%/V
Output Clock Duty Cycle
RBIAS = 54.9k
l
25
50
75
%
CLKIO Pin High Level
Input Voltage
CLKCNTL = 0V (Note 6)
V+D – 0.3
V
CLKIO Pin Low Level
Input Voltage
CLKCNTL = 0V (Note 6)
0.3
V
CLKIO Pin Input Current
CLKCNTL = 0V
CLKIO = 0V (Note 7)
CLKIO = V+D
l
–1
10
A
CLKIO Pin High Level
Output Voltage
V+A = V+D = 3V, CLKCNTL = 3V
IOH = –1mA
IOH = –4mA
2.95
2.9
V
CLKIO Pin Low Level
Output Voltage
V+A = V+D = 3V, CLKCNTL = 3V
IOL = 1mA
IOL = 4mA
0.05
0.1
V
CLKIO Rise Time
V+A = V+D = CLKCNTL = 3V, 20%/80%, CLOAD = 5pF
0.3
ns
CLKIO Fall Time
V+A = V+D = CLKCNTL = 3V, 20%/80%, CLOAD = 5pF
0.3
ns
SER, MUTE
High Level Input Voltage
Pins 17, 20
l
V+D – 0.3
V
SER, MUTE
Low Level Input Voltage
Pins 17, 20
l
0.3
V
SER, MUTE
Input Current
Pin 17 or Pin 20 = 0V (Note 7)
Pin 17 or Pin 20 = V+D
l
–10
2
A
CLKCNTL High Level
Input Voltage
Pin 5
l
V+D – 0.5
V
CLKCNTL Low Level
Input Voltage
Pin 5
0.5
V
CLKCNTL Input Current
CLKCNTL = 0V (Note 7)
CLKCNTL = V+D
l
–25
–15
15
25
A
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