參數(shù)資料
型號(hào): LTC6601CUF-1#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 14/40頁(yè)
文件大?。?/td> 0K
描述: IC DRVR FILTER/ADC LN 20-QFN
標(biāo)準(zhǔn)包裝: 91
頻率 - 截止或中心: 28Mhz
濾波器數(shù): 3
濾波器階數(shù): 2nd
電源電壓: 2.7 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 20-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 20-QFN 裸露焊盤(pán)(4x4)
包裝: 管件
LTC6601-1
21
66011f
APPLICATIONS INFORMATION
INTERFACING THE LTC6601 TO ADC CONVERTERS
The LTC6601’s rail-to-rail differential output and adjustable
output common mode voltage make the LTC6601 ideal
for interfacing to low voltage, single supply, differential
input ADCs. The sampling process of ADCs creates a
sampling transient that is caused by the switching-in
of the ADC sampling capacitor. The switching-in of this
sampling capacitor momentarily “shorts” the output of the
amplier as charge is transferred between amplier and
sampling capacitor. The amplier must recover and settle
from this load transient before this acquisition period has
ended, for a valid representation of the input signal. The
LTC6601 will settle much more quickly from these peri-
odic load impulses than it does from a 2V input step, but
it is a good idea to add an RC network after the outputs
of the LTC6601 to decouple the sampling transient of the
ADC (See Figure 6). The capacitance of the decoupling
network serves to provide the bulk of the charge during
the sampling process, while the two resistors of the lter
network are used to dampen and attenuate any transient
induced by the ADC. The ADC’s sampling bandwidth will
often be much greater than that of the LTC6601, so hav-
ing this discrete RC lter will give the additional benet
of band limiting broadband output noise.
The selection of the RC time constant is trial and error
for a given ADC, but the following guidelines are recom-
mended. Choose an RC pole frequency greater than the
cutoff frequency of the LTC6601. 80MHz RC lters are
good for ltering broadband noise. Lower frequency RC
lters improve SNR at the expense of settling time. The
resistors in the decoupling network should be at least 25Ω.
Too much resistance in the decoupling network leaves
insufcient settling time and will create a voltage divider
between the dynamic input impedance of the ADC and the
decoupling resistors. Using insufcient resistance might
prevent proper dampening of the load transient caused by
the sampling process, and prolong the time required for
settling. In 16-bit applications, this will typically require
a minimum of 11 RC time constants. It is recommended
that the capacitor is chosen with low dielectric absorption
(such as a C0G multilayer ceramic capacitor).
+
0.1μF
VOUT
VOUT
+
10nF
BIAS
1μF
C1
C2
3V
R
VOCM
66011 F06
C1
t = R (C1 + 2 C2)
2.2μF
1μF
3.3V
D15
D0
VIN
+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
AIN
+
AIN
VCM
GND
CONTROL
LTC6601-1
Figure 6. Interfacing the LTC6601 to A/D Converters
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