參數(shù)資料
型號(hào)： LTC6416IDDB#TRMPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 7/20頁(yè)
文件大小： 0K
描述： IC DIFF 16BIT BUFFER 10-DFN
標(biāo)準(zhǔn)包裝： 1
放大器類型： 緩沖器
電路數(shù)： 1
輸出類型： 差分
轉(zhuǎn)換速率： 3400 V/µs
-3db帶寬： 2GHz
電流 - 輸入偏壓： 5µA
電壓 - 輸入偏移： 500µV
電流 - 電源： 42mA
電流 - 輸出 / 通道： 20mA
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 3.9 V，±1.35 V ~ 1.95 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 10-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 10-DFN-EP（3x2）
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面： 1323 (CN2011-ZH PDF)
其它名稱： LTC6416IDDB#TRMPBFDKR
LTC6416
15
6416f
APPLICATIONS INFORMATION
As seen in Table 1, suggested component values for the
lter will change for differing IF frequencies.
Table 1.
INPUT
FREQUENCY
LTC6416 OUTPUT
RESISTORS
FILTERING
CAPACITORS
30MHz
50Ω
5.6pF/6.8pF/5.6pF
70MHz
25Ω
5.6pF/6.8pF/5.6pF
140MHz
25Ω
1.5pF/1pF/1.5pF
250MHz
5Ω
-/-/-
Output Common Mode Adjustment
The output common mode voltage is set by the VCM pin.
Because the input common mode voltage is approximately
the same as the output common mode voltage, both are
approximately equal to VCM. The VCM pin has a Thevenin
equivalent resistance of 3.8k and can be overdriven by an
external voltage. The VCM pin oats to a default voltage of
1.25V on a 3.3V supply and 1.36V on a 3.6V supply. The
output common mode voltage is capable of tracking VCM
in a range from 0.34V to 2.16V on a 3.3V supply. The VCM
pin can be oated, but it should always be bypassed close
to the LTC6416 with a 0.1μF bypass capacitor to ground.
When interfacing with A/D converters such as the LTC22xx
families, the VCM pin can be connected to the VCM output
pin of the ADC, as shown in Figure 5.
CLLO and CLHI Pins
The CLLO and CLHI pins are used to set the clamping
voltage for high speed internal circuitry. This circuitry
limits the single-ended minimum and maximum voltage
excursion seen at each of the outputs. This feature is
extremely important in applications with input signals
having very large peak-to-average ratios such as cellular
basestation receivers. If a very large peak signal arrives
at the LTC6416, the voltages applied to the CLLO and
CLHI pins will determine the minimum and maximum
output swing respectively. Once the input signal returns
to the normal operating range, the LTC6416 returns to
linear operation within 5ns. Both CLLO and CLHI are high
impedance inputs. CLLO has an input impedance of 2.3k,
while CLHI has an input impedance of 4.1k. On a 3.3V
supply, CLLO self-biases to 0.25V while CLHI self-biases
to 2.23V. On a 3.6V supply, CLLO self-biases to 0.265V
while CLHI self-biases to 2.45V. Both CLLO and CLHI pins
should be bypassed with a 0.1μF capacitor as close to the
LTC6416 as possible.
Interfacing the LTC6416 to A/D Converters
The LTC6416 has been specically designed to interface
directly with high speed A/D converters. It is possible
to drive the ADC directly from the LTC6416. In practice,
however, better performance may be obtained by adding
a few external components at the output of the LTC6416.
Figure 5 shows the LTC6416 being driven by a 1:8 trans-
former which provides 9dB of voltage gain while also
performing a single-ended to differential conversion. The
differential outputs of the LTC6416 are lowpass ltered,
then drive the differential inputs of the LTC2208 ADC. In
many applications, an anti-alias lter like this is desir-
able to limit the wideband noise of the amplier. This is
especially true in high performance 16-bit designs. The
minimum recommended network between the LTC6416
and the ADC is simply two 5Ω series resistors, which are
used to help eliminate resonances associated with the
stray capacitance of PCB traces and the stray inductance
of the internal bond wires at the ADC input, and the driver
output pins.
Single-Ended Signals
The LTC6416 has not been designed to convert single-
ended signals to differential signals. A single-ended input
signal can be converted to a differential signal via a balun
connected to the inputs of the LTC6416.
Power Supply Considerations
For best linearity, the LTC6416 should have a positive
supply of V+ = 3.6V. The LTC6416 has an internal edge-trig-
gered supply voltage clamp. The timing mechanism of the
clamp enables the LTC6416 to withstand ESD events. This
internal clamp is also activated by voltage overshoot and
rapid slew rate on the positive supply V+ pin. The LTC6416
should not be hot-plugged into a powered socket. Bypass
capacitors of 680pF and 0.1μF should be placed to the V+
pin, as close as possible to the LTC6416.
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