V+ 100k V<" />
參數(shù)資料
型號: LTC6406IUD#TRPBF
廠商: Linear Technology
文件頁數(shù): 3/24頁
文件大小: 0K
描述: IC DIFF AMP/DRIVER R-R 16-QFN
標(biāo)準(zhǔn)包裝: 2,500
類型: ADC 驅(qū)動器
應(yīng)用: 數(shù)據(jù)采集
安裝類型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-QFN-EP(3x3)
包裝: 帶卷 (TR)
LTC6406
11
6406fc
PIN FUNCTIONS
LTC6406 Block Diagram/Pinout in QFN Package
V+
100k
V+
50Ω
1.25pF
50Ω
V
V+
V
+
1
5
VTIP
6
–IN
7
+OUT
8
+OUTF
16
NC
15
+IN
14
–OUT
13
–OUTF
2
V+
3
V
V+
V
4
VOCM
12
V
6406 BD02
11
V+
10
V+
9
V
V+
V
SHDN
43k
30k
32k
LTC6406 Block Diagram/Pinout in MSOP Package
V+
V
V+
V
+
1
–IN
2
VOCM
3
V+
4
+OUT
8
+IN
7
6
V
5
–OUT
43k
30k
6406 BD01
100k
SHDN
is designed to drive a load capacitance of 5pF. Larger
capacitive loads should be decoupled with at least 15
Ω
resistors from each output.
+OUTF, –OUTF (Pins 8, 13/NA): Filtered Output Pins. These
pins have a series RC network (R = 50
Ω, C = 3.75pF) con-
nected between the ltered and unltered outputs. See the
Applications Information section for more details.
+IN, –IN (Pins 15, 6/Pins 8, 1): Noninverting and Inverting
Input Pins of the amplier, respectively. For best perfor-
BLOCK DIAGRAMS
(QFN/MSOP)
mance, it is highly recommended that stray capacitance
be kept to an absolute minimum by keeping printed circuit
connections as short as possible.
NC (Pin 16/NA): No Connection. This pin is not connected
internally.
Exposed Pad (Pin 17/Pin 9): Tie the bottom pad to V. If
split supplies are used, DO NOT tie the pad to ground.
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