參數(shù)資料
型號: LTC6242HVIGN#PBF
廠商: Linear Technology
文件頁數(shù): 5/32頁
文件大?。?/td> 0K
描述: IC OP AMP QUAD R-R 16-SSOP
標(biāo)準(zhǔn)包裝: 100
放大器類型: 通用
電路數(shù): 4
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 10 V/µs
增益帶寬積: 18MHz
電流 - 輸入偏壓: 0.5pA
電壓 - 輸入偏移: 60µV
電流 - 電源: 2.5mA
電流 - 輸出 / 通道: 35mA
電壓 - 電源,單路/雙路(±): 2.8 V ~ 11 V,±1.4 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SSOP
包裝: 管件
LTC6240/LTC6241/LTC6242
13
624012fe
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indenitely.
Note 3: The LTC6240C/LTC6240HVC/LTC6241C/LTC6241HVC, LTC6242C/
LTC6242HVC are guaranteed to meet specied performance from 0°C to
70°C. They are designed, characterized and expected to meet specied
performance from –40°C to 85°C, but are not tested or QA sampled at
these temperatures. The LTC6240I/LTC6240HVI, LTC6241I/LTC6241HVI,
LTC6242I/LTC6242HVI are guaranteed to meet specied performance
from –40°C to 85°C. All versions of the LTC6240H/LTC6241H/LTC6242H
are guaranteed to meet specied performance from –40°C to 125°C.
Note 4: ESD (Electrostatic Discharge) sensitive device. ESD protection
devices are used extensively internal to the LTC6240/LTC6241/LTC6242;
however, high electrostatic discharge can damage or degrade the device.
Use proper ESD handling precautions.
Note 5: Matching parameters are the difference between the two ampliers
A and D and between B and C of the LTC6242; between the two ampliers
of the LTC6241. CMRR and PSRR match are dened as follows: CMRR
and PSRR are measured in μV/V on the matched ampliers. The difference
is calculated between the matching sides in μV/V. The result is converted
to dB.
Note 6: This parameter is not 100% tested.
Note 7: Bias current at TA = 25°C is 100% tested and guaranteed for the
LTC6240 in the S8 package. The LTC6240S5, LTC6241 and LTC6242 are
expected to achieve the same performance as the LTC6240S8. All parts are
guaranteed to meet specications over temperature.
Note 8: Current noise is calculated from the formula: in = (2qIB)1/2 where
q = 1.6
× 10–19 coulomb. The noise of source resistors up to 50GΩ
dominates the contribution of current noise. See also Typical Performance
Characteristics curve Noise Current vs Frequency.
Note 9: Output voltage swings are measured between the output and
power supply rails.
Note 10: Minimum supply voltage is guaranteed by the power supply
rejection ratio test.
Note 11: Slew rate is measured in a gain of –2 with RF = 1k and RG =
500Ω. On the LTC6240/LTC6241/LTC6242, VS = ±2.5V, VIN is ±1V and
VOUT slew rate is measured between –1V and +1V. On the LTC6240HV/
LTC6241HV/LTC6242HV, VIN is ±2V and VOUT slew rate is measured
between –2V and +2V.
Note 12: Full-power bandwidth is calculated from the slew rate:
FPBW = SR/πVP-P.
ELECTRICAL CHARACTERISTICS
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