參數(shù)資料
型號(hào)： LTC6241HVIDD#PBF
廠商： Linear Technology
文件頁(yè)數(shù)： 14/32頁(yè)
文件大小： 0K
描述： IC OP AMP DUAL R-R 8-DFN
標(biāo)準(zhǔn)包裝： 121
放大器類(lèi)型： 通用
電路數(shù)： 2
輸出類(lèi)型： 滿擺幅
轉(zhuǎn)換速率： 10 V/µs
增益帶寬積： 18MHz
電流 - 輸入偏壓： 0.5pA
電壓 - 輸入偏移： 100µV
電流 - 電源： 2.5mA
電流 - 輸出 / 通道： 35mA
電壓 - 電源，單路/雙路(±)： 2.8 V ~ 11 V，±1.4 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-WFDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 8-DFN-EP（3x3）
包裝： 管件
LTC6240/LTC6241/LTC6242
21
624012fe
The op amp’s good input offset voltage match and low
input bias current means that the typical differential output
offset voltage is less than 40μV. A noise spectrum plot of
the differential output is shown in Figure 5.
The guard ring should extend as far as necessary to shield
the high impedance signal from any and all leakage paths.
Figure 6 shows the use of a guard ring on the LTC6241 in
a unity gain conguration. In this case the guard ring is
connected to the output and is shielding the high impedance
noninverting input from V–. Figure 7 shows the inverting
gain conguration.
A Digitally Programmable AC Difference Amplier
The LTC6241 congured as a difference amplier, can be
combined with a programmable gain amplier (PGA) to
obtain a low noise high speed programmable difference
amplier. Figure 8 shows the LTC6241 based as a single-
supply AC amplier. One LTC6241 op amp is used at the
circuit’s input as a standard four resistor difference amplier.
Figure 5. Differential Output Noise
Achieving Low Input Bias Current
The DD package is leadless and makes contact to the PCB
beneath the package. Solder ux used during the attach-
ment of the part to the PCB can create leakage current
paths and can degrade the input bias current performance
of the part. All inputs are susceptible because the backside
paddle is connected to V– internally. As the input voltage
changes or if V– changes, a leakage path can be formed
and alter the observed input bias current. For lowest bias
current, use the LTC6240/LTC6241 in the SO-8 and provide
a guard ring around the inputs that are tied to a potential
near the input voltage.
Layout Considerations and a PCB Guard Ring
In high source impedance applications such as pH probes,
photodiodes, strain gauges, et cetera, the low input bias
current of these parts requires a clean board layout to
minimize additional leakage current into a high impedance
signal node. A mere 100GΩ of PC board resistance
between a 5V supply trace and an input trace adds 50pA
of leakage current, far greater then the input bias current
of the operational amplier. A guard ring around the high
impedance input traces driven by a low impedance source
equal to the input voltage prevents such leakage problems.
Figure 6. Sample Layout. Unity Gain Conguration, Using Guard
Ring to Shield High Impedance Input from Board Leakage
Figure 7. Sample Layout. Inverting Gain Conguration, Using
Guard Ring to Shield High Impedance Input from Board Leakage
APPLICATIONS INFORMATION
FREQUENCY (kHz)
020
60
10
40
80
30
70
50
90 100
DIFFERENTIAL
OUTPUT
VOLTAGE
DENSITY
(nV/√
Hz
)
140
60
80
100
120
0
20
40
6241 F05
VS = ±2.5V
TA = 25°C
–3dB BW = 80kHz
LTC6241 S8
R
OUT+
IN–
IN+
V–
LEAKAGE
CURRENT
NO LEAKAGE
CURRENT
GUARD
RING
NO SOLDER MASK
OVER THE GUARD RING
LTC6241 F06
LTC6241 S8
LTC6241 F07
R
OUT+
IN–
IN+
V–
VIN
GND
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