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參數(shù)資料
| 型號(hào)： | LTC6102HVIMS#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO8 |
| 封裝： | LEAD FREE, PLASTIC, MSOP-8 |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 257K |
| 代理商： | LTC6102HVIMS#PBF |
LTC6102/LTC6102HV
11
6102fa
must be chosen such that the max output voltage does
not exceed the LTC6102 max output voltage rating. If the
following circuit is a buffer or ADC with limited input range,
then ROUT must be chosen so that IOUT(MAX) ROUT is less
than the allowed maximum input range of this circuit.
In addition, the output impedance is determined by ROUT. If
the circuit to be driven has high enough input impedance,
then almost any output impedance will be acceptable.
However, if the driven circuit has relatively low input imped-
ance, or draws spikes of current, such as an ADC might
do, then a lower ROUT value may be required in order to
preserve the accuracy of the output. As an example, if the
input impedance of the driven circuit is 100 times ROUT,
then the accuracy of VOUT will be reduced by 1% since:
Error Sources
The current sense system uses an amplier and resistors
to apply gain and level shift the result. The output is then
dependent on the characteristics of the amplier, such as
gain and input offset, as well as resistor matching.
Ideally, the circuit output is:
VOUT = VSENSE
ROUT
RIN
;VSENSE =RSENSE ISENSE
In this case, the only error is due to resistor mismatch,
which provides an error in gain only.
Output Error, EOUT, Due to the Amplier DC Offset
Voltage, VOS
EOUT(VOS) = VOS (ROUT/RIN)
The DC offset voltage of the amplier adds directly to the
value of the sense voltage, VSENSE. This error is very small
(3μV typ) and may be ignored for reasonable values of RIN.
For very high dynamic range, this offset can be calibrated
in the system due to its extremely low drift.
APPLICATIONS INFORMATION
Figure 4. Second Input R Minimizes
Error Due to Input Bias Current
VOUT =IOUT
ROUT RIN(DRIVEN)
ROUT +RIN(DRIVEN)
=IOUT ROUT
100
101
= 0.99 IOUT ROUT
–INF
VREG
0.1μF
–INS
6102 F04
RIN
+ = RIN– – RSENSE
LTC6102
ROUT
VOUT
V+
LOAD
RSENSE
–
+
V+
V–
OUT
+IN
RIN
–
RIN
+
Output Error, EOUT, Due to the Bias Currents,
IB(+) and IB(–)
The input bias current of the LTC6102 is vanishingly small.
However, for very high resolution, or at high temperatures
where IB increases due to leakage, the current may be
signicant.
The bias current IB(+) ows into the positive input of the
internal op amp. IB(–) ows into the negative input.
EOUT(IBIAS) = ROUT((IB(+) (RSENSE/RIN) – IB(–))
Since IB(+) ≈ IB(–) = IBIAS, if RSENSE << RIN then,
EOUT(IBIAS) ≈ –ROUT IBIAS
For instance if IBIAS is 1nA and ROUT is 10k, the output
error is –10μV.
Note that in applications where RSENSE ≈ RIN, IB(+) causes
a voltage offset in RSENSE that cancels the error due to
IB(–) and EOUT(IBIAS) ≈ 0. In applications where RSENSE <
RIN, the bias current error can be similarly reduced if an
external resistor RIN(+) = (RIN – RSENSE) is connected as
shown in Figure 4. Under both conditions:
EOUT(IBIAS) = ± ROUT IOS; IOS = IB(+) – IB(–)
Adding RIN+ as described will maximize the dynamic
range of the circuit. For less sensitive designs, RIN+ is
not necessary.
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