參數(shù)資料
型號: LTC4558EUD
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC20
封裝: 3 X 3 MM, 0.75 MM HEIGHT, PLASTIC, QFN-20
文件頁數(shù): 9/12頁
文件大?。?/td> 146K
代理商: LTC4558EUD
LTC4558
6
4558fa
PIN FUNCTIONS
DVCC (Pin 2): Power. Reference voltage for the control
logic.
VBATT (Pin 3): Power. Supply voltage for the analog sec-
tions of the LTC4558.
VCCA,VCCB (Pins 4, 1): Card Socket. The VCCA,VCCB pins
should be connected to the VCC pins of the respective card
sockets. The activation of the VCCA,VCCB pins are controlled
by ENABLEA and ENABLEB. They can be set to 1.8V or 3V
via the VSELA and VSELB inputs.
CLKA,CKLB (Pins 5, 20): Card Socket. The CLKA,CKLB
pins should be connected to the CLK pins of the respective
card sockets. The CLKA,CKLB signals are derived from the
CLKIN pin. They provide a level shifted CLKIN signal to
the selected card. The CLKA,CKLB pins are gated off until
VCCA,VCCB attain their correct values. When a card socket
is deselected, its CLK pin may be left active or brought
LOW using the CLKRUNA, CLKRUNB pins.
RSTA,RSTB (Pins 6, 19): Card Socket. The RSTA,RSTB
pins should be connected to the RST pins of the respec-
tive card sockets. The RSTA,RSTB signals are derived
from the RSTIN pin. When a card is selected, its RST
pin follows RSTIN. The RSTA,RSTB pins are gated off
until VCCA,VCCB attain their correct values. When a card
socket is deselected, the state of its RST pin is latched to
its current state.
I/OA,I/OB (Pins 7, 18): Card Socket. The I/OA,I/OB pins
should be connected to the I/O pins of the respective card
sockets. When a card is selected, its I/O pin transmits/re-
ceives data to/from the DATA pin. The I/OA,I/OB pins are
gated off until VCCA,VCCB attain their correct values.
DATA (Pin 8): Input/Output. Microcontroller side data I/O
pin. The DATA pin provides the bidirectional communication
path to both cards. One of the cards may be selected to
communicate via the DATA pin at a time. The pin possesses
a weak pull-up current source, allowing the controller to
use an open drain output and maintain a HIGH state during
shutdown, as long as DVCC is powered.
RSTIN (Pin 9): Input. The RSTIN pin supplies the reset
signal to the cards. It is level shifted and transmitted
directly to the RST pin of the selected card.
CLKIN (Pin 10): Input. The CLKIN pin supplies the clock
signal to the cards. It is level shifted and transmitted di-
rectly to the CLK pin of the selected card. If CLKRUNA,B
is HIGH, the clock signal will be transmitted to the CLKA,B
pin, regardless of whether that card is selected, as long
as that card socket is enabled.
ENABLEA, ENABLEB (Pins 11, 17): Inputs. The ENABLEA
and ENABLEB pins enable or disable channel A and chan-
nel B, respectively.
VSELA, VSELB (Pins 12, 16): Inputs. The VSELA and
VSELB pins select the voltage level of each set of SIM/
Smart Card pins. Bringing either of these pins HIGH will
set the output level of its respective channel to 3V. Bring-
ing either of these pins LOW will set the output level of
its respective channel to 1.8V.
CSEL (Pin 13): Input. The CSEL pin selects which set of
SIM/Smart Card pins are active.
CLKRUNA, CLKRUNB (Pins 14, 15): Inputs. The CLKRUNA
and CLKRUNB inputs are used to select whether the clock
signal is always sent to card sockets that are enabled or
whether the clock is gated with the CSEL pin.
Exposed Pad (Pin 21): Ground. This ground pad must be
soldered directly to a PCB ground plane.
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