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參數(shù)資料
| 型號： | LTC4315IDE#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 2WIRE BUS BUFFER 12DFN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 2線總線緩沖器 |
| Tx/Rx類型： | I²C Logic |
| 電容 - 輸入： | 10pF |
| 電源電壓： | 2.9 V ~ 5.5 V |
| 電流 - 電源： | 8.1mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 12-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 12-DFN（4x3） |
| 包裝： | 帶卷 (TR) |
LTC4315
4
4315f
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IACC(IN, Z)
Allowable Leakage Current in
the Open State
VCC = VCC2 = 5V
l
±5
μA
VREADY(OL)
READY Output Low Voltage
IREADY = 3mA, VCC = 5V
l
0.4
V
IREADY(OH)
READY Off Leakage Current
VCC = VREADY = 5V
l
0.1
±5
μA
Stuck Low Timeout Circuitry
tTIMEOUT
Bus Stuck Low Timer
SDAOUT or SCLOUT < 0.3 VMIN (Note 5)
l
35
45
55
ms
VFAULT(OL)
FAULT Output Low voltage
IFAULT = 3mA
l
0.4
V
IFAULT(OH)
FAULT Off Leakage Current
VCC = VFAULT = 5V
l
0.1
±5
μA
I2C Interface Timing
fSCL(MAX)
I2C Frequency Max
l
400
kHz
tPDHL
SCL, SDA Fall Delay
VCC = VCC2 = VDD(BUS) = 5V, CBUS = 100pF,
RBUS = 10kΩ (Note 7)
130
250
ns
tf
SCL, SDA Fall Times
VCC = VCC2 = VDD(BUS) = 5V, CBUS = 100pF,
RBUS = 10kΩ (Note 7)
20
300
ns
tIDLE
Bus Idle Time
l
55
95
175
μs
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive and all voltages are referenced
to GND unless otherwise indicated.
Note 3: The LTC4315 can level translate bus voltages ranging from
2.25V to 5.5V. In special cases, it can also level translate down to 1.4V.
See the Applications Information section for more details.
Note 4: Test performed with SDA, SCL buffers active.
Note 5: VMIN = minimum of VCC and VCC2 if VCC2 > 2.25V, otherwise
VMIN = VCC.
Note 6: VIL is tested for the following (VCC, VCC2) combinations;
(2.9V, 5.5V), (5.5V, 2.25V), (3.3V, 3.3V) and (5V, 0V).
Note 7: Guaranteed by design and not tested.
Note 8: Measured in a special DC mode with VSDA,SCL = VRTA(TH) + 1V.
The transient IRTA during rising edges, when ACC is LOW, will depend on
the bus loading condition and the slew rate of the bus. The LTC4315’s
internal slew rate control circuitry limits the maximum bus rise rate to
75V/μs by controlling the transient IRTA.
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = VCC2 = 3.3V unless otherwise noted.
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