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參數(shù)資料
| 型號： | LTC4315CMS#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 2WIRE BUS BUFFER 12MSOP |
| 標(biāo)準(zhǔn)包裝： | 37 |
| 類型： | 2線總線緩沖器 |
| Tx/Rx類型： | I²C Logic |
| 電容 - 輸入： | 10pF |
| 電源電壓： | 2.9 V ~ 5.5 V |
| 電流 - 電源： | 8.1mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 12-TSSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 12-MSOP |
| 包裝： | 管件 |
LTC4315
16
4315f
APPLICATIONS INFORMATION
First, when two or more buffers are connected in a cas-
cade configuration, if the sum of the offsets across the
cascade (refer to Equation 3 and the data sheets of the
corresponding buffers) plus the worst-case driven logic
low voltage exceeds the minimum buffer turn-off voltage,
signals will not be propagated across the cascade. The
maximum driven logic low voltage must be set accord-
ingly, for correct operation in such cascades.
Second, noise margin is affected by cascading the LTC4315
with buffers whose RTA turn-on voltage is lower than the
LTC4315 buffer turn-off voltage. The VIL for the LTC4315
is set to 0.3 VMIN to achieve high noise margin provided
that the LTC4315 buffers do not contend with RTAs of
other products. To maximize logic low noise margin,
disable the RTAs of the other LTC buffers if possible and
use the RTAs of the LTC4315 in cascading applications.
To permit interoperability with other LTC buffers whose
RTAs cannot be disabled, the LTC4315 senses the RTA
current and turns off its buffers below 0.3 VMIN. This
eliminates contention between the LTC4315 buffers and
other RTAs, making the SDA/SCL waveforms monotonic.
Figure 10. The LTC4315 Operating in a Cascade with Other LTC Buffers with Active RTAs. Only the Clock Pathway Is Shown for Simplicity
Figure 11. Corresponding SCL Switching Waveforms. No Glitches
Are Seen.
Figure 10 shows the LTC4315 operating on a bus shared
with LTC4300A and LTC4307 buffers. The correspond-
ing SCL waveforms are shown in Figure 11. The RTAs
on the LTC4300A and the LTC4307 cannot be disabled.
The backplane in Figure 11 has five I/O cards connected
to it. Each I/O card has a LTC bus buffer on its outside
edge for SDA/SCL hot swap onto the backplane. In this
4315 F10
LTC4315
GND
VCC
VCC2
SCLOUT
SCLIN
ACC
SCL1
R3
2.7k
R1
5k
C1
0.01μF
3.3V
I/O CARD #1
I/O CARD #2 TO #4
I/O CARD #5
CB1
100pF
*CB2
690pF
*PARASITIC BACKPLANE CAPACITANCE
R2
2.7k
5V
SCL2
BACKPLANE
R4
5k
LTC4300A
GND
VCC
SCLOUT
SCLIN
SCL3
LTC4307
GND
VCC
SCLOUT
SCLIN
SCL4
1μs/DIV
SCL3
2V/DIV
SCL2
2V/DIV
SCL1
2V/DIV
4315 F11
LTC4315
RTA
TURNS ON
LTC4300A/
LTC4307
RTAs
TURN ON
LTC4315
BUFFERS
TURN OFF
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC4315IDE#PBF | 功能描述:IC 2WIRE BUS BUFFER 12DFN RoHS:是 類別:集成電路 (IC) >> 接口 - 信號緩沖器，中繼器，分配器 系列:- 標(biāo)準(zhǔn)包裝:160 系列:- 類型:轉(zhuǎn)發(fā)器 Tx/Rx類型:以太網(wǎng) 延遲時間:- 電容 - 輸入:- 電源電壓:2.37 V ~ 2.63 V 電流 - 電源:60mA 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP（10x10） 包裝:托盤 其它名稱:Q5134101 |
| LTC4315IDE#TRPBF | 功能描述:IC 2WIRE BUS BUFFER 12DFN RoHS:是 類別:集成電路 (IC) >> 接口 - 信號緩沖器，中繼器，分配器 系列:- 標(biāo)準(zhǔn)包裝:160 系列:- 類型:轉(zhuǎn)發(fā)器 Tx/Rx類型:以太網(wǎng) 延遲時間:- 電容 - 輸入:- 電源電壓:2.37 V ~ 2.63 V 電流 - 電源:60mA 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP（10x10） 包裝:托盤 其它名稱:Q5134101 |
| LTC4315IMS#PBF | 功能描述:IC 2WIRE BUS BUFFER 12MSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 信號緩沖器，中繼器，分配器 系列:- 標(biāo)準(zhǔn)包裝:160 系列:- 類型:轉(zhuǎn)發(fā)器 Tx/Rx類型:以太網(wǎng) 延遲時間:- 電容 - 輸入:- 電源電壓:2.37 V ~ 2.63 V 電流 - 電源:60mA 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP（10x10） 包裝:托盤 其它名稱:Q5134101 |
| LTC4315IMS#TRPBF | 功能描述:IC 2WIRE BUS BUFFER 12MSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 信號緩沖器，中繼器，分配器 系列:- 標(biāo)準(zhǔn)包裝:160 系列:- 類型:轉(zhuǎn)發(fā)器 Tx/Rx類型:以太網(wǎng) 延遲時間:- 電容 - 輸入:- 電源電壓:2.37 V ~ 2.63 V 電流 - 電源:60mA 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP（10x10） 包裝:托盤 其它名稱:Q5134101 |
| LTC435 | 制造商:Thomas & Betts 功能描述:TSB COVER,4WAY,350MCM |
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