參數(shù)資料
型號: LTC4313CMS8-3#TRPBF
廠商: Linear Technology
文件頁數(shù): 19/20頁
文件大小: 0K
描述: IC 2WIRE BUS BUFFER 8MSOP
標準包裝: 2,500
類型: 2線總線緩沖器
Tx/Rx類型: I²C Logic
電容 - 輸入: 10pF
電源電壓: 2.9 V ~ 5.5 V
電流 - 電源: 8.1mA
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 8-MSOP
包裝: 帶卷 (TR)
LTC4313-1/LTC4313-2/
LTC4313-3
8
4313123f
The LTC4313 provides capacitance buffering, data and
clock Hot Swap capability and level translation. The high
noise margin of the LTC4313 permits interoperability with
I2C devices that drive a high VOL permits series connec-
tion of multiple LTC4313s and improves I2C communica-
tion reliability. The LTC4313 isolates backplane and card
capacitances and provides slew control of falling edges
while level translating 3.3V and 5V busses. The LTC4313-1
and LTC4313-2 also provide pull-up currents to accelerate
rising edges. These features are illustrated in the following
subsections.
Rise Time Accelerator (RTA) Pull-Up Current Strength
(LTC4313-1 and LTC4313-2)
Afteraninputandoutputconnectionhasbeenestablished,
the RTAs on both the input and output sides of the SDA
and SCL busses are activated. During positive bus transi-
tions of at least 0.4V/s, the RTAs provide pull-up cur-
rents to reduce rise time. The RTAs allow users to choose
larger bus pull-up resistors to reduce power consumption
and improve logic low noise margins, design with bus
capacitances outside of the I2C specification or to oper-
ate at a higher clock frequency. The LTC4313-1 regulates
its RTA current to limit the bus rise rate to a maximum
applicaTions inForMaTion
Figure 1. Bus Rising Edge for the LTC4313-1. VCC = VDD,BUS = 5V
Figure 2. Bus Rising Edge for the LTC4313-2. VCC = VDD,BUS = 5V
of 75V/s. The current is therefore directly proportional
to the bus capacitance. The LTC4313-1 RTA is capable of
sourcing up to 40mA of current. Rise time acceleration
for the LTC4313-2 is provided by a 2.5mA current source.
Figures 1 and 2 show the rising waveforms of heavily
loaded SDAIN and SDAOUT busses for the LTC4313-1 and
LTC4313-2 respectively. In both figures, during a rising
edge, the buffers are active and the input and output sides
are connected, until the bus voltages on both the input
and output sides are greater than 0.3 VCC. When each
individual bus voltage rises above 0.41 VCC, the RTA on
that bus turns on. The effect of the acceleration strength
is shown in the waveforms in Figures 1 and 2 for identi-
cal bus loads. The RTAs of the LTC4313-1 and LTC4313-2
supply10mAand2.5mAofpull-upcurrentrespectivelyfor
the bus conditions shown in Figures 1 and 2. For identical
bus loads, the bus rises faster in Figure 1 compared to
Figure 2 because of the higher IRTA.
The RTAs are internally disabled during power-up and dur-
ing a bus stuck low event. The RTAs when activated pull
the bus up to 0.9VCC on the input and output sides of the
SDA and SCL pins. In order to prevent bus overdrive by
the RTA, the bus supplies on the input and output sides
2V/DIV
1s/DIV
4313123 F01
VCC = VDD,BUS = 5V
RBUS = 20k
CIN = COUT = 200pF
SDAIN
SDAOUT
2V/DIV
1s/DIV
4313123 F02
VCC = VDD,BUS = 5V
RBUS = 20k
CIN = COUT = 200pF
SDAIN
SDAOUT
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