參數(shù)資料
型號(hào): LTC4260IUH#PBF
廠商: Linear Technology
文件頁(yè)數(shù): 5/30頁(yè)
文件大?。?/td> 295K
描述: IC HOT SWAP CNTRL I2C 32-QFN
標(biāo)準(zhǔn)包裝: 73
類型: 熱交換控制器
應(yīng)用: 通用
內(nèi)部開(kāi)關(guān): 無(wú)
電源電壓: 8.5 V ~ 80 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 管件
LTC4260
5
4260fc
For more information www.linear.com/LTC4260
elecTrical characTerisTics
 
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
 = 25癈. V
DD
 = 48V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
2
C Interface Timing (Note 4)
f
SCL(MAX)
Maximum SCL Clock Frequency
Operates with f
SCL
 d f
SCL(MAX)
400
kHz
t
BUF(MIN)
Minimum Bus Free Time Between
Stop/Start Condition
0.12
1.3
t
SU,STA(MIN)
Minimum Repeated Start Condition
Set-Up Time
30
600
ns
t
HD,STA(MIN)
Minimum Hold Time After (Repeated)
Start Condition
140
600
ns
t
SU,STO(MIN)
Minimum Stop Condition Set-Up Time
30
600
ns
t
SU,DAT(MIN)
Minimum Data Set-Up Time Input
30
100
ns
t
HD,DATI(MIN)
Minimum Data Hold Time Input
100
0
ns
t
HD,DATO(MIN)
Minimum Data Hold Time Output
300
500
900
ns
t
SP(MAX)
Maximum Suppressed Spike Pulse Width
50
110
250
ns
C
X
SCL, SDA Input Capacitance
SDAI Tied to SDAO
5
10
pF
Note 1: Stresses beyond those listed under Absolute Maximum Ratings 
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device 
pins are negative. All voltages are referenced to GND unless otherwise
specified.
Note 3: Limits on maximum rating is defined as whichever limit occurs first. 
An internal clamp limits the GATE pin to a minimum of 10V above source.
Driving this pin to voltages beyond the clamp may damage the device.
Note 4: Guaranteed by design and not subject to test.
Note 5: Integral nonlinearity is defined as the deviation of a code from a 
precise analog input voltage. Maximum specifications are limited by the
LSB step size and the single shot measurement. Typical specifications are
measured from the 1/4, 1/2 and 3/4 areas of the quantization band.
Note 6: For the V
DD
-SENSE channel, full-scale is at code 255 but codes
above 200 may be discarded by offset cancellation. Full scale error and
total unadjusted error are evaluated over the 0-200 code range. Full scale
voltage corresponds to the theoretical code 255, and is extrapolated from
a code 200 measurement.
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