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參數資料
| 型號： | LTC4257IDD-1 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | Power over Ethernet Interface Controller with Dual Current Limit |
| 中文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | 3 X 3 MM, PLASTIC, M0-229WEED-1, DFN-8 |
| 文件頁數： | 13/32頁 |
| 文件大?。?/td> | 1975K |
| 代理商： | LTC4257IDD-1 |
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LTC4267
13
4267f
Figure 5. LTC4267 V
PORTN
Undervoltage Lockout
the classification current is reenabled. C1 will discharge
through the PD circuitry and the P
OUT
pin will go to a high
impedance state.
limit because the load capacitor is charged with a current
below the IEEE inrush current limit specification.
As the LTC4267 switches from the low to high level current
limit, the current will increase momentarily. This current
spike is a result of the LTC4267 charging the last 1.5V at
the high level current limit. When charging a 10μF capaci-
tor, the current spike is typically 100μs wide and 125%
of the nominal low level current limit.
The LTC4267 stays in the high level current limit mode
until the input voltage drops below the UVLO turn-off
threshold. This dual level current limit provides the sys-
tem designer with the flexibility to design PDs which are
compatible with legacy PSEs while also being able to take
advantage of the higher power allocation available in an
IEEE 802.3af system.
During the current limited turn on, a large amount of
power is dissipated in the power MOSFET. The LTC4267
PD interface is designed to accept this thermal load and
is thermally protected to avoid damage to the onboard
power MOSFET. Note that in order to adhere to the IEEE
802.3af standard, it is necessary for the PD designer to
ensure the PD steady state power consumption falls within
the limits shown in Table 2. In addition, the steady state
current must be less than I
LIM_HI
.
Power Good
The LTC4267 PD Interface includes a power good circuit
(Figure 6) that is used to indicate that load capacitor C1
is fully charged and that the switching regulator can start
operation. The power good circuit monitors the voltage
across the internal UVLO power MOSFET and
P
W
R
G
D is
asserted when the voltage falls below 1.5V. The power
good circuit includes hysteresis to allow the LTC4267 to
operate near the current limit point without inadvertently
disabling
P
W
R
G
D. The MOSFET voltage must increase to
3V before
P
W
R
G
D is disabled.
If a sudden increase in voltage appears on the input line,
this voltage step will be transferred through capacitor C1
and appear across the power MOSFET. The response of
the LTC4267 will depend on the magnitude of the voltage
step, the rise time of the step, the value of capacitor C1
and the switching regulator load. For fast rising inputs,
APPLICATIU
W
U
U
Input Current Limit
IEEE 802.3af specifies a maximum inrush current and also
specifies a minimum load capacitor between the V
PORTP
and P
OUT
pins. To control turn-on surge current in the
system, the LTC4267 integrates a dual level current limit
circuit with an onboard power MOSFET and sense resis-
tor to provide a complete inrush control circuit without
additional external components. At turn-on, the LTC4267
will limit the input current to the low level, allowing the
load capacitor to ramp up to the line voltage in a controlled
manner.
The LTC4267 has been specifically designed to interface
with legacy PSEs which do not meet the inrush current
requirement of the IEEE 802.3af specification. At turn-on
the LTC4267 current limit is set to the lower level. After C1
is charged up and the P
OUT
– V
PORTN
voltage difference is
below the power good threshold, the LTC4267 switches
to the high level current limit. The dual level current limit
allows legacy PSEs with limited current sourcing capability
to power up the PD while also allowing the PD to draw full
power from an IEEE 802.3af PSE. The dual level current
limit also allows use of arbitrarily large load capacitors.
The IEEE 802.3af specification mandates that at turn-on
the PD not exceed the inrush current limit for more than
50ms. The LTC4267 is not restricted to the 50ms time
C1
5μF
MIN
V
PORTN
V
PORTP
P
OUT
PGND
LTC4267
4267 F05
TO
PSE
UNDERVOLTAGE
LOCKOUT
CIRCUIT
CURRENT-LIMITED
TURN ON
+
INPUT
VOLTAGE
0V TO UVLO*
>UVLO*
*UVLO INCLUDES HYSTERESIS
RISING INPUT THRESHOLD
–36V
FALLING INPUT THRESHOLD
–30.5V
LTC4267
POWER MOSFET
OFF
ON
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相關代理商/技術參數 |
參數描述 |
|---|---|
| LTC4257IDD-1#PBF | 功能描述:IC CONTROLLER POE INTERFACE 8DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 標準包裝:50 系列:- 類型:熱交換控制器 應用:-48V 遠程電力系統(tǒng)，AdvancedTCA ? 系統(tǒng)，高可用性 內部開關:無 電流限制:可調 電源電壓:11.5 V ~ 14.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:10-MSOP 包裝:管件 |
| LTC4257IDD-1#TR | 功能描述:IC CONTROLLER POE INTERFACE 8DFN RoHS:否 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 標準包裝:50 系列:- 類型:熱交換控制器 應用:-48V 遠程電力系統(tǒng)，AdvancedTCA ? 系統(tǒng)，高可用性 內部開關:無 電流限制:可調 電源電壓:11.5 V ~ 14.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:10-MSOP 包裝:管件 |
| LTC4257IDD-1#TRPBF | 功能描述:IC CONTROLLER POE INTERFACE 8DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 標準包裝:50 系列:- 類型:熱交換控制器 應用:-48V 遠程電力系統(tǒng)，AdvancedTCA ? 系統(tǒng)，高可用性 內部開關:無 電流限制:可調 電源電壓:11.5 V ~ 14.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:10-MSOP 包裝:管件 |
| LTC4257IS8 | 功能描述:IC CONTROLLER POE INTERFAC 8SOIC RoHS:否 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 標準包裝:50 系列:- 類型:熱交換控制器 應用:-48V 遠程電力系統(tǒng)，AdvancedTCA ? 系統(tǒng)，高可用性 內部開關:無 電流限制:可調 電源電壓:11.5 V ~ 14.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:10-MSOP 包裝:管件 |
| LTC4257IS8#PBF | 功能描述:IC CTRLR INTFACE PWR/ETHER 8SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 標準包裝:50 系列:- 類型:熱交換控制器 應用:-48V 遠程電力系統(tǒng)，AdvancedTCA ? 系統(tǒng)，高可用性 內部開關:無 電流限制:可調 電源電壓:11.5 V ~ 14.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:10-TFSOP，10-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:10-MSOP 包裝:管件 |
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