參數(shù)資料
型號: LTC4252-1IMS8
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: TRANS ARRAY NPN/NPN SSMINI-6
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: PLASTIC, MSOP-8
文件頁數(shù): 20/32頁
文件大?。?/td> 327K
代理商: LTC4252-1IMS8
LTC4252-1/LTC4252-2
20
425212f
APPLICATIU
W
U
U
GND – V
OR
(–48RTN) – (–48V)
UV/OV
V
IN
TIMER
GATE
V
LKO
SENSE
V
IN
CLEARS V
LKO
, CHECK UV > V
UVHI
, OV < V
OVLO
, GATE < V
GATEL
, SENSE < V
CB
, SS < 20 V
OS
AND TIMER < V
TMRL
V
OUT
1
2
3 4 56
7
8
V
ACL
V
CB
9
TIMER CLEARS V
TMRL
, CHECK GATE < V
GATEL
, SENSE < V
CB
AND SS < 20 V
OS
SS
DRAIN
PWRGD
230
μ
A + 8 I
DRN
5.8
μ
A
20 V
OS
58
μ
A
1011
V
IN
– V
GATEH
V
DRNL
V
DRNCL
20 (V
CB
+ V
OS
)
20 (V
ACL
+ V
OS
)
V
GATEL
V
TMRL
V
TMRH
5.8
μ
A
5.8
μ
A
58
μ
A
4252-1/2 F08
GATE
START-UP
INITIAL TIMING
Figure 8. System Power-Up Timing (All Waveforms are Referenced to V
EE
)
V
ACL
(t) (Equation 7) and soft-start limits the slew rate of
the load current. If the SENSE voltage (V
SENSE
– V
EE
)
reaches the V
CB
threshold at time point 7, the circuit
breaker TIMER activates. The TIMER capacitor, C
T
, is
charged by a (230
μ
A + 8 I
DRN
) current pull-up. As the load
capacitor nears full charge, load current begins to decline.
At time point 8, the load current falls and the SENSE
voltage drops below V
ACL
(t). The analog current limit loop
shuts off and the GATE pin ramps further. At time point 9,
the SENSE voltage drops below V
CB
, the fault TIMER cycle
ends, followed by a 5.8
μ
A discharge cycle (cool off). The
duration between time points 7 and 9 must be shorter than
one circuit breaker delay to avoid a fault time out during
GATE ramp-up. When GATE ramps past the V
GATEH
thresh-
old at time point 10, PWRGD pulls low. At time point11,
GATE reaches its maximum voltage as determined by V
IN
.
Live Insertion with Short Pin Control of UV/OV
In the example shown in Figure 9, power is delivered
through long connector pins whereas the UV/OV divider
makes contact through a short pin. This ensures the power
connections are firmly established before the LTC4252 is
activated. At time point 1, the power pins make contact and
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