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參數(shù)資料
| 型號： | LTC4010EFE |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.2 A BATTERY CHARGE CONTROLLER, 640 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | 4.40 MM, PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 281K |
| 代理商： | LTC4010EFE |
LTC4010
4010fb
formed by C1 and the parallel combination of R1 and R2
is recommended for rejecting PWM switching noise. The
value of C1 should be chosen to yield a 1st order lowpass
frequency of less than 500Hz. In the case of a single cell,
the external application circuit shown in Figure 4 is rec-
ommended to provide the necessary noise filtering and
missing battery detection.
External Thermistor
The network for proper temperature sensing using a
thermistorwithanegativetemperaturecoefficient(NTC)is
shown in Figure 5. The LTC4010 is designed to work best
with a 1% 10k NTC thermistor with a
b of 3750. However,
the LTC4010 will operate satisfactorily with other 10k NTC
thermistors having slightly different nominal exponential
temperature coefficients. For these thermistors, the tem-
peraturerelatedlimitsgivenintheElectricalCharacteristics
table may not strictly apply. The filter formed by C1 in
Figure 5 is optional but recommended for rejecting PWM
switching noise.
applicaTions inForMaTion
on voltage inflection may not be adequate to protect the
battery from a severe overcharge.
INTVDD Regulator Output
If BGATE is left open, the INTVDD pin of the LTC4010 can be
used as an additional source of regulated voltage in the host
systemanytimeREADYisactive.SwitchingloadsonINTVDD
may reduce the accuracy of internal analog circuits used to
monitorandterminatefastcharging.Inaddition,DCcurrent
drawn from the INTVDD pin can greatly increase internal
power dissipation at elevated VCC voltages. A minimum
ceramic bypass capacitor of 0.1F is recommended.
Calculating Average Power Dissipation
TheusershouldensurethatthemaximumratedICjunction
temperatureisnotexceededunderalloperatingconditions.
The thermal resistance of the LTC4010 package (
qJA)
is 38°C/W, provided the exposed metal pad is properly
soldered to the PCB. The actual thermal resistance in the
application will depend on the amount of PCB copper to
which the package is soldered. Feedthrough vias directly
below the package that connect to inner copper layers
are helpful in lowering thermal resistance. The following
formula may be used to estimate the maximum average
power dissipation PD (in watts) of the LTC4010 under
normal operating conditions.
P
V
mA I
k Q
Q
I
D
CC
DD
TGATE
BGATE
DD
=
+
(
)
9
615
3 85
(
)
– .
++
+
60
30
2
n
V
R
CC
LED
–
where:
IDD = Average external INTVDD load current, if any
QTGATE = Gate charge of external P-channel MOSFET
in coulombs
QBGATE = Gate charge of external N-channel MOSFET
(if used) in coulombs
VLED = Maximum external LED forward voltage
RLED = External LED current-limiting resistor used in
the application
n = Number of LEDs driven by the LTC4010
Figure 4. Single-Cell Monitor Network
10
7
BAT
10k
33nF
1 CELL
4010 F04
VCDIV
6
VCELL
Figure 5. External NTC Thermistor Network
5
VTEMP
RT
10k NTC
C1
68nF
4010 F05
Disabling Thermistor Functions
Temperature sensing is optional in LTC4010 applications.
For low cost systems where temperature sensing may
not be required, the VTEMP pin may simply be wired to
GND through 10k to disable temperature qualification
of all charging operations. However, this practice is not
recommended for NiMH cells charged well above or below
their 1C rate, because fast charge termination based solely
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