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參數(shù)資料
| 型號(hào)： | LTC3862HGN#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO24 |
| 封裝： | 0.150 INCH, LEAD FREE, PLASTIC, SSOP-24 |
| 文件頁數(shù)： | 10/40頁 |
| 文件大小： | 613K |
| 代理商： | LTC3862HGN#PBF |
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LTC3862
18
3862fb
OPERATION
Table 1
PHASEMODE
CH-1 to CH-2
PHASE
CH-1 to CLKOUT
PHASE
APPLICATION
SGND
180°
90°
2-Phase, 4-Phase
Float
180°
60°
6-Phase
3V8
120°
240°
3-Phase
Using the LTC3862 Transconductance (gm) Error
Amplier in Multi-Phase Applications
The LTC3862 error amplier is a transconductance, or gm
amplier, meaning that it has high DC gain but high output
impedance (the output of the error amplier is a current
proportional to the differential input voltage). This style
of error amplier greatly eases the task of implementing
a multi-phase solution, because the ampliers from two
or more chips can be connected in parallel. In this case
the FB pins of multiple LTC3862s can be connected to-
gether, as well as the ITH pins, as shown in Figure 8. The
gm of the composite error amplier is simply n times the
transconductance of one amplier, or gm(TOT) = n 660μS,
where n is the number of ampliers connected in paral-
lel. The transfer function from the ITH pin to the current
comparator inputs was carefully designed to be accurate,
both from channel-to-channel and chip-to-chip. This way
the peak inductor current matching is kept accurate.
A buffered version of the output of the error amplier
determines the threshold at the input of the current com-
parator. The ITH voltage that represents zero peak current
is 0.4V and the voltage that represents current limit is
1.2V (at low duty cycle). During an overload condition, the
output of the error amplier is clamped to 2.6V at low duty
cycle, in order to reduce the latency when the overload
condition terminates. A patented circuit in the LTC3862 is
used to recover the slope compensation signal, so that the
maximum peak inductor current is not a strong function
of the duty cycle.
Soft-Start
The start-up of the LTC3862 is controlled by the voltage on
the SS pin. An internal PNP transistor clamps the current
comparator sense threshold during soft-start, thereby
limiting the peak switch current. The base of the PNP is
connected to the SS pin and the emitter to an internal,
FREQ
FB
CLKOUT
SYNC
PLLFLTR
LTC3862
MASTER
SGND
ITH
VOUT
INTVCC
SS
RUN
ON/OFF
CONTROL
ALL RUN PINS
CONNNECTED
TOGETHER
INDIVIDUAL
INTVCC PINS
LOCALLY
DECOUPLED
FREQ
FB
CLKOUT
SYNC
PLLFLTR
LTC3862
SLAVE
SGND
ITH
INTVCC
SS
RUN
SLAVE
3862 F08
ALL SS PINS
CONNNECTED
TOGETHER
FREQ
FB
ALL FB PINS
CONNECTED
TOGETHER
ALL ITH PINS
CONNECTED
TOGETHER
CLKOUT
SYNC
PLLFLTR
LTC3862
SGND
ITH
INTVCC
SS
RUN
Figure 8. LTC3862 Error Amplier Conguration
for Multi-Phase Operation
buffered ITH node (please note that the ITH pin voltage may
not track the soft-start voltage during this time period).
An internal 5μA current source charges the SS capacitor,
and clamps the peak sense threshold until the voltage on
the soft-start capacitor reaches approximately 0.6V. The
required amount of soft-start capacitance can be estimated
using the following equation:
CμA
t
V
SS
=
5
06
.
The SS pin has an internal open-drain NMOS pull-down
transistor that turns on when the RUN pin is pulled low,
when the voltage on the INTVCCpinisbelowitsundervoltage
lockout threshold, or during an overtemperature condi-
tion. In multi-phase applications that use more than one
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