參數(shù)資料
型號: LTC3830ES
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 16-Bit Bus Transceiver With 3-State Outputs 54-BGA MICROSTAR JUNIOR -40 to 85
中文描述: SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16
封裝: 0.150 INCH, PLASTIC, SO-16
文件頁數(shù): 10/24頁
文件大小: 305K
代理商: LTC3830ES
10
LTC3830/LTC3830-1
sn3830 3830fs
The R
DS(ON)
of Q1 usually increases with temperature. To
keep the current limit threshold constant, the internal
12
μ
A sink current at I
MAX
is designed with a positive
temperature coefficient to provide first order correction
for the temperature coefficient of R
DS(ON)Q1
.
In order for the current limit circuit to operate properly and
to obtain a reasonably accurate current limit threshold, the
I
IMAX
and I
FB
pins must be Kelvin sensed at Q1’s drain and
source pins. In addition, connect a 0.1
μ
F decoupling
capacitor across R
IMAX
to filter switching noise. Other-
wise, noise spikes or ringing at Q1’s source can cause the
actual current limit to be greater than the desired current
limit set point. Due to switching noise and variation of
R
DS(ON)
, the actual current limit trip point is not highly
accurate. The current limiting circuitry is primarily meant
to prevent damage to the power supply circuitry during
fault conditions. The exact current level where the limiting
circuit begins to take effect will vary from unit to unit as the
R
DS(ON)
of Q1 varies. Typically, R
DS(ON)
varies as much as
±
40% and with
±
25% variation on the LTC3830’s I
MAX
current, this can give a
±
65% variation on the current limit
threshold.
The R
DS(ON)
is high if the V
GS
applied to the MOSFET is
low. This occurs during power up, when PV
CC1
is ramping
up. To prevent the high R
DS(ON)
from activating the current
limit, the LTC3830 disables the current limit circuit if
PV
CC1
is less than 2.5V above V
CC
. To ensure proper
operation of the current limit circuit, PV
CC1
must be at
least 2.5V above V
CC
when G1 is high. PV
CC1
can go low
when G1 is low, allowing the use of an external charge
pump to power PV
CC1
.
Oscillator Frequency
The LTC3830 includes an onboard current controlled
oscillator that typically free-runs at 200kHz. The oscillator
frequency can be adjusted by forcing current into or out of
the FREQSET pin. With the pin floating, the oscillator runs
at about 200kHz. Every additional 1
μ
A of current into/out
of the FREQSET pin decreases/increases the frequency by
10kHz. The pin is internally servoed to 1.265V, connecting
a 50k resistor from FREQSET to ground forces 25
μ
A out
of the pin, causing the internal oscillator to run at approxi-
mately 450kHz. Forcing an external 10
μ
A current into
FREQSET cuts the internal frequency to 100kHz. An inter-
nal clamp prevents the oscillator from running slower than
about 50kHz. Tying FREQSET to V
CC
forces the chip to run
at this minimum speed. The LTC3830-1 and the 8-lead
LTC3830 do not have this frequency adjustment function.
Shutdown
The LTC3830 includes a low power shutdown mode,
controlled by the logic at the SHDN pin. A high at SHDN
allows the part to operate normally. A low level at SHDN for
more than 100
μ
s forces the LTC3830 into shutdown
mode. In this mode, all internal switching stops, the COMP
and SS pins pull to ground and Q1 and Q2 turn off. The
LTC3830 supply current drops to <10
μ
A, although off-
state leakage in the external MOSFETs may cause the total
V
IN
current to be some what higher, especially at elevated
temperatures. If SHDN returns high, the LTC3830 reruns
a soft-start cycle and resumes normal operation. The
LTC3830-1 does not have this shutdown function.
External Clock Synchronization
The LTC3830 SHDN pin doubles as an external clock input
for applications that require a synchronized clock. An
internal circuit forces the LTC3830 into external synchro-
nization mode if a negative transition at the SHDN pin is
detected. In this mode, every negative transition on the
SHDN pin resets the internal oscillator and pulls the ramp
signal low, this forces the LTC3830 internal oscillator to
lock to the external clock frequency. The LTC3830-1 does
not have this external synchronization function.
APPLICATIOU
W
U
U
+
+
12
I
MAX
13
LTC3830
CC
12
μ
A
0.1
μ
F
Q2
C
OUT
3830 F04
C
IN
V
IN
V
OUT
G2
R
IMAX
I
FB
1k
+
Q1
L
O
G1
Figure 4. Current Limit Setting
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