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參數(shù)資料
| 型號： | LTC3816EFE#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, PDSO38 |
| 封裝： | LEAD FREE, PLASTIC, TSSOP-38 |
| 文件頁數(shù)： | 40/44頁 |
| 文件大?。?/td> | 753K |
| 代理商： | LTC3816EFE#TRPBF |
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LTC3816
3816f
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, BSOURCE = EXTVCC = 0V, VRON = 5V, unless
otherwise noted. (Notes 2, 3)
elecTrical characTerisTics
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VID, DPRSLPVR, LFF Parameters
VIL(VID)
VID Input Low Threshold
0.3
V
VIH(VID)
VID Input High Threshold
0.7
V
IVID
VID Input Leakage Current
0V ≤ VVID ≤ 5V
±1
A
VDPRSLPVR
DPRSLPVR Input Threshold
VIMON = INTVCC (IMVP-6 Configuration)
1.6
V
ILFF
LFF Pull-Up Current
VLFF = 0V
–1
A
VLFF
LFF Input Threshold
1
V
PWRGD, CLKEN#, VRTT#
VPWRGD
Positive Power Good Threshold
Negative Power Good Threshold
With Respect to VID VCC(CORE)
150
–240
175
–270
200
–300
mV
ILEAK
PWRGD, CLKEN# Leakage Current
VRTT# Leakage Current
VPWRGD = VCLKEN# = 5V
VVRTT# = 3.3V
10
100
A
VOL
PWRGD, CLKEN# Output Low Voltage
VRTT# Output Low Voltage
IOUT = 2mA
IOUT = 20mA
0.1
0.075
0.3
0.18
V
tPWRGD
PWRGD Glitch Filter
Power Good to Power Bad
750
s
tCLKEN#
CLKEN# Falling Edge Delay
Rising VBOOT Edge to CLKEN#
Falling Edge
l
50
75
100
s
tCLK(PWRGD)
CLKEN# to PWRGD Rising Edge Delay
l
5
10
20
ms
tVR(PWRGD)
VRON to PWRGD Falling Edge Delay
VRON Falling Edge
100
ns
Note 1: Stresses beyond those listed under Absolute Maximum
Ratings may cause permanent damage to the device. Exposure to any
Absolute Maximum Rating condition for extended periods may affect
device reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of
device pins are negative. All voltages are referenced to ground unless
otherwise specified.
Note 3: The LTC3816 is tested under pulse load conditions such that
TJ ≈ TA. The LTC3816E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. LTC3816I specifications are
guaranteed over the full –40°C to 125°C operating junction temperature
range. Note that the maximum ambient temperature consistent with
these specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance
and other environmental factors. TJ is calculated from the ambient
temperature, TA, and power dissipation, PD, according to the following
formula,
LTC3816EFE: TJ = TA + (PD 29°C/W)
LTC3816EUHF: TJ = TA + (PD 34°C/W)
Note 4: The dynamic input supply current is a function of the power
MOSFET gate charging (QG fOSC). See Applications Information for
more information.
Note 5: The LTC3816 is measured in a feedback loop that adjusts
VCC(SEN) – VSS(SEN) to achieve a specified COMP pin voltage. The AITC
amplifier is configured as an inverter with gain = –1.
Note 6: Guaranteed by design, not subject to test.
Note 7: On-resistance limit is guaranteed by design and correlation
with statistical process controls.
Note 8: The LTC3816 includes overtemperature protection that is
intended to protect the device during momentary overload conditions.
The maximum rated junction temperature will be exceeded when this
protection is active. Continuous operation above the specified absolute
maximum operating junction temperature may impair device reliability
or permanently damage the device.
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