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參數(shù)資料
| 型號： | LTC3788EGN-1#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | DUAL SWITCHING CONTROLLER, 900 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | 0.150 INCH, LEAD FREE, PLASTIC, SSOP-28 |
| 文件頁數(shù)： | 16/30頁 |
| 文件大?。?/td> | 384K |
| 代理商： | LTC3788EGN-1#TRPBF |
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LTC3788-1
23
37881fb
applicaTions inForMaTion
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 7. Figure 8 illustrates the current
waveforms present in the various branches of the 2-phase
synchronousregulatorsoperatinginthecontinuousmode.
Check the following in your layout:
1.PutthebottomN-channelMOSFETsMBOT1andMBOT2
and the top N-channel MOSFETs MTOP1 and MTOP2
in one compact area with COUT.
2. Are the signal and power grounds kept separate? The
combined IC signal ground pin and the ground return of
CINTVCCmustreturntothecombinedCOUT(–)terminals.
The path formed by the bottom N-channel MOSFET and
the CIN capacitor should have short leads and PC trace
lengths. The output capacitor (–) terminals should be
connected as close as possible to the (–) terminals of
the input capacitor by placing the capacitors next to
each other.
3. Do the LTC3788-1 VFB pins’ resistive dividers connect
to the (+) terminals of COUT? The resistive divider must
be connected between the (+) terminal of COUT and
signal ground and placed close to the VFB pin. The
feedback resistor connections should not be along the
high current input feeds from the input capacitor(s).
4. Are the SENSE– and SENSE+ leads routed together with
minimumPCtracespacing?Thefiltercapacitorbetween
SENSE+ and SENSE– should be as close as possible
to the IC. Ensure accurate current sensing with Kelvin
connections at the sense resistor.
5. Is the INTVCC decoupling capacitor connected close
to the IC, between the INTVCC and the power ground
pins? This capacitor carries the MOSFET drivers’ cur-
rent peaks. An additional 1F ceramic capacitor placed
immediately next to the INTVCCandPGNDpinscanhelp
improve noise performance substantially.
6. Keep the switching nodes (SW1, SW2), top gate nodes
(TG1, TG2) and boost nodes (BOOST1, BOOST2) away
from sensitive small-signal nodes, especially from the
opposites channel’s voltage and current sensing feed-
back pins. All of these nodes have very large and fast
moving signals and, therefore, should be kept on the
output side of the LTC3788-1 and occupy a minimal
PC trace area.
7. Use a modified “star ground” technique: a low imped-
ance, large copper area central grounding point on
the same side of the PC board as the input and output
capacitors with tie-ins for the bottom of the INTVCC
decouplingcapacitor,thebottomofthevoltagefeedback
resistive divider and the SGND pin of the IC.
PC Board Layout Debugging
Start with one controller on at a time. It is helpful to use
a DC-50MHz current probe to monitor the current in the
inductor while testing the circuit. Monitor the output
switching node (SW pin) to synchronize the oscilloscope
to the internal oscillator and probe the actual output volt-
age. Check for proper performance over the operating
voltage and current range expected in the application.
The frequency of operation should be maintained over the
input voltage range down to dropout and until the output
load drops below the low current operation threshold—
typically 10% of the maximum designed current level in
Burst Mode operation.
Thedutycyclepercentageshouldbemaintainedfromcycle
to cycle in a well designed, low noise PCB implementation.
Variation in the duty cycle at a subharmonic rate can sug-
gest noise pickup at the current or voltage sensing inputs
or inadequate loop compensation. Overcompensation of
the loop can be used to tame a poor PC layout if regulator
bandwidth optimization is not required. Only after each
controllerischeckedforitsindividualperformanceshould
both controllers be turned on at the same time. A particu-
larly difficult region of operation is when one controller
channel is nearing its current comparator trip point while
the other channel is turning on its bottom MOSFET. This
occurs around the 50% duty cycle on either channel due
to the phasing of the internal clocks and may cause minor
duty cycle jitter.
Reduce VIN from its nominal level to verify operation with
high duty cycle. Check the operation of the undervoltage
lockout circuit by further lowering VIN while monitoring
the outputs to verify operation.
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| LTC3789EGN#TRPBF | 0.1 A SWITCHING CONTROLLER, 710 kHz SWITCHING FREQ-MAX, PDSO28 |
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| LTC3789EGN#PBF | 0.1 A SWITCHING CONTROLLER, 710 kHz SWITCHING FREQ-MAX, PDSO28 |
| LTC3789IUFD#PBF | 0.1 A SWITCHING CONTROLLER, 710 kHz SWITCHING FREQ-MAX, PQCC28 |
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| LTC3788EUH#PBF | 功能描述:IC REG CTRLR BST PWM CM 32-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,500 系列:PowerWise® PWM 型:控制器 輸出數(shù):1 頻率 - 最大:1MHz 占空比:95% 電源電壓:2.8 V ~ 5.5 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 125°C 封裝/外殼:6-WDFN 裸露焊盤 包裝:帶卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名稱:LM1771SSDX |
| LTC3788EUH#TRPBF | 功能描述:IC REG CTRLR BST PWM CM 32-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:4,500 系列:PowerWise® PWM 型:控制器 輸出數(shù):1 頻率 - 最大:1MHz 占空比:95% 電源電壓:2.8 V ~ 5.5 V 降壓:是 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:-40°C ~ 125°C 封裝/外殼:6-WDFN 裸露焊盤 包裝:帶卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名稱:LM1771SSDX |
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