參數(shù)資料
型號(hào)： LTC3775IMSE#PBF
廠商： LINEAR TECHNOLOGY CORP
元件分類(lèi)： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, 575 kHz SWITCHING FREQ-MAX, PDSO16
封裝： LEAD FREE, PLASTIC, MSOP-16
文件頁(yè)數(shù)： 17/34頁(yè)
文件大小： 534K
代理商： LTC3775IMSE#PBF
LTC3775
24
3775fa
MODE/SYNC Pin
The MODE/SYNC pin is a dual function pin that can be
used to program the operating mode or to synchronize
the switching frequency to an external clock. Pulse-
skipping mode is enabled when the MODE/SYNC pin is
above 1.2V. The mode is forced continuous when the pin
is below 1.2V.
If this pin is left oating, an internal 50k pull-down resistor
defaults the selection to forced continuous mode. During
power-up, the LTC3775 overrides this mode selection and
operates in pulse-skipping mode to prevent the discharge
of a pre-biased output capacitor.
The internal LTC3775 oscillator can be synchronized
to an external clock with a signal greater than 1.5V. A
low-to-high transition on the MODE/SYNC pin resets the
oscillator sawtooth waveform (high) and forces TG low
(see Figure 17).The external oscillator frequency must be
within ±20% of the frequency programmed by the RSET
resistor, or else the part will revert to free-running mode.
The internal oscillator locks to the external clock after
the second clock transition is received. When external
synchronization is detected, the LTC3775 will operate in
forced continuous mode.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3775. Check the following in your layout:
1. Keep the signal and power grounds separate. The signal
ground consists of the LTC3775 SGND pin and the (–)
terminal of VOUT. The power ground consists of the
optional Schottky diode anode, the source of the bottom
side MOSFET, and the (–) terminal of the input capacitor.
Connect the signal ground to the (–) terminal of the
output capacitor. Also, try to connect the (–) terminal
of the output capacitor as close as possible to the (–)
terminals of the input capacitor.
2. The high di/dt loop formed by the top N-channel MOSFET,
the bottom MOSFET and the CIN capacitor should have
short leads and PC trace lengths to minimize high
frequency noise and voltage stress from inductive
ringing.
3. Connect the drain of the topside MOSFET directly to the
(+) plate of CIN, and connect the source of the bottom
side MOSFET directly to the (–) terminal of CIN. This
capacitor provides the AC current to the MOSFETs.
4. Place the ceramic CINTVCC decoupling capacitor im-
mediately next to the IC, between INTVCC and SGND.
Likewise, the CB capacitor should also be next to the
IC between BOOST and SW.
5. Place the small-signal components away from high
frequency switching nodes (BOOST, SW, TG and BG).
6. For optimum load regulation and true remote sensing,
the top of the output resistor divider should connect
independently to the top of the output capacitor (Kelvin
connection), staying away from any high dV/dt traces.
Place the divider resistors near the LTC3775 in order
to keep the high impedance FB node short.
7. For applications with multiple switching power convert-
ers connected to the same input supply, make sure
that the input lter capacitor for the LTC3775 is not
shared with other converters. AC input current from
another converter could cause substantial input voltage
APPLICATIONS INFORMATION
EXTERNAL CLOCK
AT MODE/SYNC PIN
PWM RAMP
TG
3775 F17
Figure 17. External Synchronization
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