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參數(shù)資料
| 型號(hào)： | LTC3565IMSE#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 2.5 A SWITCHING REGULATOR, 4000 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | LEAD FREE, PLASTIC, MSOP-10 |
| 文件頁數(shù)： | 10/22頁 |
| 文件大小： | 587K |
| 代理商： | LTC3565IMSE#PBF |
LTC3565
3565fa
applications inForMation
The output voltage can now be programmed by choosing
the values of R1 and R2. To maintain high efficiency, the
current in these resistors should be kept small. Choosing
2Awiththe0.6VfeedbackvoltagemakesR1~300k.Aclose
standard 1% resistor value is 294k then R2 is 931k.
The compensation should be optimized for these compo-
nentsbyexaminingtheloadstepresponsebutagoodplace
to start for the LTC3565 is with a 12.1kΩ and 680pF filter.
The output capacitor may need to be increased depending
on the actual undershoot during a load step.
ThePGOODpinisacommondrainoutputandrequiresapull-
up resistor. A 100k resistor is used for adequate speed.
The circuit on page 1 of this data sheet shows the complete
schematic for this design example.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3565. These items are also illustrated graphically
in the layout diagram of Figure 4. Check the following in
your layout:
1. Does the capacitor CIN connect to the power VIN (Pin 6)
andpowerGND(Pin5)ascloseaspossible?Thiscapacitor
provides the AC current to the internal power MOSFETs
and their drivers.
2. Are the COUT and L1 closely connected? The (–) plate of
COUT returns current to PGND and the (–) plate of CIN.
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of COUT and a ground line. The
feedback signal VFB should be routed away from noisy
components and traces, such as the SW line (Pin 4), and
its trace should be minimized.
4. Keep sensitive components away from the SW pin. The
input capacitor CIN, the compensation capacitor CC and
CITH and all the resistors R1, R2, RT, and RC should be
routed away from the SW trace and the inductor L1. The
SW pin pad should be kept as small as possible.
5. A ground plane is preferred, but if not available, keep
thesignalandpowergroundssegregatedwithsmallsignal
components returning to the GND pin at one point.
6. Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of power
components. These copper areas should be connected to
one of the input supply rails: PVIN, SVIN or GND.
L1
1
2
3
4
5
10
9
8
7
6
CC
CITH
C4
3565 F06
RC
R1
R2
VIN
VOUT
BOLD LINES INDICATE HIGH CURRENT PATHS
CIN
COUT
PVIN
LTC3565
GND
SW
SVIN
SYNC/MODE
PGOOD
VFB
R5
RUN
ITH
RT
RT
Figure 4. LTC3565 Layout Diagram (See Board Layout Checklist)
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