參數(shù)資料
型號(hào): LTC3565EDD#TRPBF
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: 2.5 A SWITCHING REGULATOR, 4000 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, LEAD FREE, PLASTIC, MO-229WEED-2, DFN-10
文件頁(yè)數(shù): 7/22頁(yè)
文件大?。?/td> 587K
代理商: LTC3565EDD#TRPBF
LTC3565
3565fa
Checking Transient Response
The OPTI-LOOP compensation allows the transient re-
sponsetobeoptimizedforawiderangeofloadsandoutput
capacitors. The availability of the ITH pin not only allows
optimization of the control loop behavior but also provides
a DC coupled and AC filtered closed loop response test
point. The DC step, rise time and settling time at this test
point truly reflects the closed loop response. Assuming a
predominantlysecondordersystem,phasemarginand/or
damping factor can be estimated using the percentage of
overshoot seen at this pin. The bandwidth can also be
estimated by examining the rise time at the pin.
TheITHexternalcomponentsshowninthecircuitonpage1
ofthisdatasheetwillprovideanadequatestartingpointfor
most applications. The series R-C filter sets the dominant
pole-zero loop compensation. The values can be modified
slightly (from 0.5 to 2 times their suggested values) to
optimize transient response once the final PC layout is
done and the particular output capacitor type and value
have been determined. The output capacitors need to be
selected because the various types and values determine
the loop feedback factor gain and phase. An output current
pulse of 20% to 100% of full load current having a rise
time of 1s to 10s will produce output voltage and ITH
pin waveforms that will give a sense of the overall loop
stability without breaking the feedback loop.
Switching regulators take several cycles to respond to
a step in load current. When a load step occurs, VOUT
immediately shifts by an amount equal to
ΔILOAD ESR,
whereESRistheeffectiveseriesresistanceofCOUT.ΔILOAD
also begins to charge or discharge COUT generating a
feedback error signal used by the regulator to return VOUT
to its steady-state value. During this recovery time, VOUT
can be monitored for overshoot or ringing that would
indicate a stability problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine
phase margin. The gain of the loop increases with R and
the bandwidth of the loop increases with decreasing C.
If R is increased by the same factor that C is decreased,
the zero frequency will be kept the same, thereby keeping
the phase the same in the most critical frequency range
of the feedback loop. In addition, a feedforward capacitor
CF can be added to improve the high frequency response,
as shown in Figure 2. Capacitor CF provides phase lead by
creating a high frequency zero with R2 which improves
the phase margin.
Theoutputvoltagesettlingbehaviorisrelatedtothestability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a
review of control loop theory, refer to Linear Technology
Application Note 76.
applications inForMation
PVIN
LTC3565
PGOOD
SW
SVIN
SYNC/MODE
RUN
VFB
ITH
RT
L1
D1
OPTIONAL
VIN
GND
R5
CF
RT
RC
R1
R2
3565 F04
CC
CITH
C5
VOUT
CIN
+
C6
COUT
R6
C8
Figure 2. LTC3565 General Schematic
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LTC3565EMSEPBF 制造商:LINER 制造商全稱:Linear Technology 功能描述:1.25A, 4MHz, Synchronous Step-Down DC/DC Converter
LTC3565EMSE-PBF 制造商:LINER 制造商全稱:Linear Technology 功能描述:1.25A, 4MHz, Synchronous Step-Down DC/DC Converter