參數(shù)資料
型號(hào): LTC3565EDD#PBF
廠商: LINEAR TECHNOLOGY CORP
元件分類(lèi): 穩(wěn)壓器
英文描述: 2.5 A SWITCHING REGULATOR, 4000 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, LEAD FREE, PLASTIC, MO-229WEED-2, DFN-10
文件頁(yè)數(shù): 16/22頁(yè)
文件大小: 587K
代理商: LTC3565EDD#PBF
LTC3565
3565fa
electrical characteristics The
l
denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TJ = 25°C. VIN = 3.6V, RT = 125k unless otherwise specified. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IS
Input DC Supply Current (Note 4)
Active Mode
Sleep Mode
Shutdown
VSYNC/MODE = 3.6V, VFB = 0.55V
VSYNC/MODE = 3.6V, VFB = 0.8V
VRUN = 0V
330
40
0.1
450
60
1
A
fOSC
Oscillator Frequency
RT = 125k
(Note 7)
1.3
1.5
1.7
4
MHz
fSYNC
Synchronization Frequency
(Note 7)
0.4
4
MHz
ILIM
Peak Switch Current Limit
VIN = 3V, VFB = 0.5V
1.5
2.1
2.5
A
RDS(ON)
Top Switch On-Resistance
MSE Package
DD Package (Note 6)
0.15
0.2
Ω
Bottom Switch On-Resistance
MSE Package
DD Package (Note 6)
0.13
0.18
Ω
ISW(LKG)
Switch Leakage Current
VIN = 5.5V, VRUN = 0V, VFB = 0V
0.01
1
A
VRUN
RUN Threshold
l
0.3
0.8
1.5
V
IRUN
RUN Leakage Current
l
±0.01
±1
A
VUVLO
Undervoltage Lockout Threshold
VIN Ramping Down
1.9
2.2
V
PGOOD
Power Good Threshold
VFB Ramping Up from 0.45V to 0.6V
VFB Ramping Down from 0.69V to 0.6V
–7
7
%
RPGOOD
Power Good Pull-Down On-Resistance
15
20
Ω
PGOOD Blanking
VFB Step from 0V to 0.6V
VFB Step from 0.6V to 0V
40
105
s
VSYNC-MODE
Pulse Skip
Force Continuous
Burst
1.1
VIN – 0.75
0.63
VIN – 1.05
V
tSOFT-START
10% to 90% of Regulation
0.6
0.9
1.2
ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3565E is guaranteed to meet performance specifications
from 0°C to 85°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3565I is guaranteed over the full –40°C to 125°C operating junction
temperature range. Note that the maximum ambient temperature is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 3: The LTC3565 is tested in a feedback loop which servos VFB to the
midpoint for the error amplifier (VITH = 0.7V).
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5: TJ is calculated from the ambient TA and power dissipation PD
according to the following formulas:
LTC3565EDD: TJ = TA + (PD 43°C/W)
LTC3565EMSE: TJ = TA + (PD 40°C/W)
Note 6: Switch on-resistance is guaranteed by correlation to wafer level
measurements and assured by design characterization and correlation with
statistical process controls.
Note 7: 4MHz operation is guaranteed by design but not production tested
and is subject to duty cycle limitations (see Applications Information).
Note 8: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
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