參數(shù)資料
型號(hào)： LTC3546IUFD#TR
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： DUAL SWITCHING CONTROLLER, 4000 kHz SWITCHING FREQ-MAX, PQCC28
封裝： 4 X 5 MM, PLASTIC, MO-220, QFN-28
文件頁(yè)數(shù)： 4/28頁(yè)
文件大小： 356K
代理商： LTC3546IUFD#TR
LTC3546
12
3546fb
OPERATION
TheLTC3546usesaconstant-frequency,currentmodearchi-
tecture. Both channels share the same clock frequency. The
PHASE pin sets whether the channels are running in-phase,
or180°out-of-phase.Theoperatingfrequencyisdetermined
by connecting the FREQ pin to VIN for 2.25MHz operation or
by connecting a resistor from FREQ to GNDA for frequencies
between 0.75MHz to 4MHz. A 143k resistor to GNDA will set
the frequency to 1.5MHz. The part can also be synchronized
to an external clock through the SYNC/MODE pin. To suit
a variety of applications, the selectable SYNC/MODE pin
allows the user to trade-off noise for efciency.
The output voltages are set by external dividers returned
to the VFB1 and VFB2 pins. An error amplier compares the
divided output voltage with a reference voltage of 0.6V and
adjusts an internal peak inductor current setting accord-
ingly. Peak inductor current during Burst Mode operation
can also be set externally through the BMC1 and BMC2
pins. Undervoltage comparators will pull the PGOOD1 or
PGOOD2 outputs low when their respective outputs drop
below –8% of the set output voltage.
The TRACK/SS pins allow for controlled start-up via an
externally or internally generated voltage ramp. It can also
track an externally applied voltage.
A 1A dependent switch, SW1D, can be externally connected
to the SW1 output or the SW2A/SW2B output. Internal
circuitry auto detects which output SW1D is connected
to and controls them accordingly. With this exibility, the
LTC3546 can be congured as either a 2A/2A dual regula-
tor (when SW1D is connected to SW1) or as a 3A/1A dual
regulator (when SW1D is connected to SW2A/SW2B).
Main Control Loop
For each regulator, during normal operation, the P-chan-
nel MOSFET power switch is turned on at the beginning
of a clock cycle when the VFB voltage is below the 0.6V
reference voltage. The current into the inductor and the
load increases until the current limit is reached. The switch
turns off and energy stored in the inductor ows through
the bottom N-channel MOSFET switch into the load until
the next clock cycle.
The peak inductor current is controlled by the voltage on the
ITH pin, which is the output of the 2.5MHz bandwidth error
amplier. The error amplier compares the VFB pin to the
0.6V reference. When the load current increases, the VFB
voltagedecreasesslightlybelowthereference.Thisdecrease
causes the error amplier to increase the ITHvoltageuntilthe
average inductor current matches the new load current.
The main control loop is shut down by pulling the RUN pin
to ground. When the RUN pin is pulled high, the control
loop goes through start-up. Start-up is dependent on the
TRACK/SS pin. If TRACK/SS is left oating, an internal
soft-start is enabled which will ramp up the output volt-
age to the desired level in 1.2ms. The output voltage will
track the voltage on its associated TRACK/SS pin. If the
TRACK/SS pin is connected through a resistor divider
from another supply, such as the output voltage from
the other LTC3546 regulator, the output voltage will track
this supply thus allowing the LTC3546 output voltage to
track the other supply start-up. If a capacitor is connected
from the TRACK/SS pin to ground, when RUN goes high,
an internal 1.15μA current source will charge the external
capacitor controlling the output voltage start-up. Care must
be taken to make sure the external start-up ramp time is
greater than the 1.2ms internal start-up time.
Low Current Operation
Three modes are available to control the operation of the
LTC3546 at low currents. All three modes automatically
switch from continuous operation to the selected mode
when the load current is low.
Tooptimizeefciency,BurstModeoperationcanbeselected.
When the load is relatively light, the LTC3546 automatically
switches into Burst Mode operation in which the switches
operate intermittently based on load demand. By running
cycles periodically, the switching losses which are domi-
nated by the gate charge losses of the power MOSFETs are
minimized. The main control loop is interrupted when the
output voltage reaches the desired regulated value.
A voltage comparator with hysteresis trips when ITHisbelow
0.24V, shutting off the switches and reducing the power.
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