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參數(shù)資料
| 型號： | LTC3536EDD#PBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 4 A SWITCHING REGULATOR, 1440 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | 3 X 3 MM, LEAD FREE, PLASTIC, MO-229WEED-2, DFN-10 |
| 文件頁數(shù)： | 2/28頁 |
| 文件大?。?/td> | 1088K |
| 代理商： | LTC3536EDD#PBF |
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LTC3536
10
3536f
OPERATION
diode from the RT pin to VIN can be used in addition to
current limiting resistor. For noise sensitive applications,
an internal phase-locked loop allows the LTC3536 to
be synchronized to an external clock signal applied to
the MODE/SYNC pin. The free-running frequency of the
oscillator can be programmed slower or faster than the
synchronization clock frequency.
Whether operating from its internal oscillator or when
synchronized to an external clock signal, the LTC3536 is
able to operate with a switching frequency from 300kHz
to 2MHz, providing the ability to minimize the size of the
external components and optimize the power conversion
efficiency.
Error Amplifier
The LTC3536 has an internal high gain operational ampli-
fierwhichprovidesfrequencycompensationofthecontrol
loop that maintains output voltage regulation. To ensure
stability of this control loop, an external compensation
network must be installed in the application circuit. A
Type III compensation network as shown in Figure 2 is
recommended for most applications since it provides the
flexibility to optimize the converter’s transient response
whilesimultaneouslyminimizinganyDCerrorintheoutput
voltage. Details on designing the compensation network
in LTC3536 applications can be found in the Applications
Information section of this data sheet.
input current limit operates by injecting a current into the
feedback pin, which is proportional to the extent that the
inductor current exceeds the input current limit threshold
(typically 2.5A). Due to the high gain of the feedback loop,
this injected current forces the error amplifier output to
decrease until the average current through the inductor
is approximately reduced to the current limit threshold.
For this current limit feature to be most effective, the
Thevenin resistance (RBOT//RTOP) from FB to ground
should exceed 100kΩ.
Figure 2. Error Amplifier and Compensation Network
+
–
0.6V
FB
GND
3536 F02
LTC3536
RFB
CFB
CPOLE
CFF
RFF
VOUT
RTOP
RBOT
VC
PWM
Input and Peak Current Limits
The LTC3536 has two current limit circuits that are de-
signed to limit the peak inductor current to ensure that
the switch currents remain within the capabilities of the
IC during output short-circuit or overload conditions. The
CURRENT OUT OF SW1 PIN (A)
0
CURRENT
FB
PIN
(A)
11
9
13
15
1.5
2.5
4.5
3536 F03
7
5
12
10
14
8
6
3
4
1
2
0
0.5 1
2
3
4
3.5
Figure 3. FB Current for Input Current Limitation
Since this input current limit circuit maintains the error
amplifier in an active state it ensures a smooth recovery
and minimal overshoot once the current limit fault condi-
tion is removed. On a hard output short, it is possible for
the inductor current to increase substantially beyond the
current limit threshold before the input current limit has
time to react and reduce the inductor current. For this
reason, there is a second current limit circuit (peak cur-
rent limit), which turns off power switch A if the current
through switch A exceeds the approximately 3.4A limit
threshold.Thisprovidesadditionalprotectioninthecaseof
an instantaneous hard output short and provides time for
the primary current limit to react. When the input voltage
is lower than 2.4V, the input and peak current limit thresh-
olds are gradually decreased. For minimum input voltage
(1.8V) they are typically 1.7A and 2.3A respectively. See
the Typical Performance Characteristics and the Inductor
Selection section for information about the inductor value
for maximum output current capability.
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