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參數(shù)資料
| 型號(hào)： | LTC3026EDD |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | 1.5A Low Input Voltage VLDO Linear Regulator |
| 中文描述： | 0.4 V-2.6 V ADJUSTABLE POSITIVE LDO REGULATOR, 0.25 V DROPOUT, PDSO10 |
| 封裝： | 3 X 3 MM, 0.75 MM HEIGHT, PLASTIC, MO-229WEED-2, DFN-10 |
| 文件頁(yè)數(shù)： | 8/16頁(yè) |
| 文件大小： | 201K |
| 代理商： | LTC3026EDD |
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LTC3026
8
3026f
OPERATIOU
The LTC3026 is a VLDO (very low dropout) linear regulator
which operates from input voltages as low as 1.14V. The
LDO uses an internal NMOS transistor as the pass device
in a source-follower configuration. The BST pin provides
the higher supply necessary for the LDO circuitry while the
output current comes directly from the IN input for high
efficiency regulation. The BST pin can either be supplied
off-chip by an external 5V source or it can be generated
through the internal boost converter of the LTC3026.
Boost Converter Operation
For applications where an external 5V supply is not avail-
able, the LTC3026 contains an internal boost converter to
produce the necessary 5V supply for the LDO. The boost
converter utilizes Burst Mode
operation to achieve high
efficiency for the relatively low current levels needed for
the LDO circuitry. The boost converter requires only a
small chip inductor between the IN and SW pins and a
small 4.7
μ
F capacitor at BST.
The operation of the boost converter is described as
follows. During the first half of the switching cycle, an
internal NMOS switch between SW and GND turns on,
ramping the inductor current. A peak comparator senses
when the inductor current reaches 100mA, at which point
the NMOS is turned off and an internal PMOS between SW
and BST turns on, transferring the inductor current to the
BST pin. The PMOS switch continues to deliver power to
BST until the inductor current approaches zero, at which
point the PMOS turns off and the NMOS turns back on,
repeating the switching cycle.
A burst comparator with hysteresis monitors the voltage
on the BST pin. When BST is above the upper threshold of
the comparator, no switching occurs. When BST falls
below the comparator’s lower threshold, switching com-
mences and the BST pin gets charged. The upper and
lower thresholds of the burst comparator are set to main-
tain a 5V supply at BST with approximately 40mV to 50mV
of ripple.
The LTC3026 has an option to disable the internal boost
converter by shorting the SW pin to GND. With the boost
converter disabled the user must provide an external 5V
supply to BST, or the BST pin can be tied to the boosted
supply of a second LTC3026 with the boost converter
enabled. Thus only one inductor is required for two (or
possibly more) functioning LTC3026s.
Care must be taken not to short the BST pin to GND, since
the body diode of the internal PMOS transistor connects
the BST and SW pins. Shorting BST to GND with an
inductor connected between IN and SW can ramp the
inductor current to destructive levels, potentially destroy-
ing the inductor and/or the part.
LDO Operation
An undervoltage lockout comparator (UVLO) senses the
BST pin voltage to ensure that the bias supply for the LDO
is greater than 4.2V before enabling the LDO. If BST is
below 4.2V, the UVLO shuts down the LDO, and OUT is
pulled to GND through the external divider and an internal
4k resistor.
The LDO provides a high accuracy output capable of
supplying 1.5A of output current with a typical dropout
voltage of only 100mV. A single ceramic capacitor as small
as 10
μ
F is all that is required for output bypassing. A low
reference voltage allows the LTC3026 output to be pro-
grammed to much lower voltages than available in com-
mon LDOs (range of 0.4V to 2.6V).
The devices also include current limit and thermal over-
load protection, and will survive an output short-circuit
indefinitely. The fast transient response of the follower
output stage overcomes the traditional tradeoff between
dropout voltage, quiescent current and load transient
response inherent in most LDO regulator architectures,
see Figure 1.
The LTC3026 also includes a soft-start feature to prevent
excessive current flow at V
IN
during start-up. When the
LDO is enabled, the soft-start circuitry gradually increases
the LDO reference voltage from 0V to 0.4V over a period
of approximately 200
μ
s, see Figure 2.
Burst Mode is a registered trademark of Linear Technology Corporation.
相關(guān)PDF資料 |
PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC3026EDD#PBF | 功能描述:IC REG LDO ADJ 1.5A 10-DFN RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):正，固定式 輸出電壓:8V 輸入電壓:10.5 V ~ 23 V 電壓 - 壓降（標(biāo)準(zhǔn)）:1.7V @ 40mA 穩(wěn)壓器數(shù)量:1 電流 - 輸出:100mA（最小值） 電流 - 限制（最?。?- 工作溫度:0°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:1075 (CN2011-ZH PDF) 其它名稱:296-24390-1 |
| LTC3026EDD#PBF | 制造商:Linear Technology 功能描述:Linear Voltage Regulator IC 制造商:Linear Technology 功能描述:IC, ADJ LDO REG 0.4V TO 2.6V 1.5A DFN-10 |
| LTC3026EDD#TR | 制造商:Linear Technology 功能描述:LDO Regulator Pos 0.4V to 2.6V 1.5A 10-Pin DFN EP T/R |
| LTC3026EDD#TRM | 制造商:Linear Technology 功能描述:LDO Regulator Pos 0.4V to 2.6V 1.5A 10-Pin DFN EP T/R |
| LTC3026EDD#TRMPBF | 制造商:Linear Technology 功能描述:LDO Regulator Pos 0.4V to 2.6V 1.5A 10-Pin DFN EP T/R |
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