參數(shù)資料
型號: LTC2927CDDB#TRM
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: 3 X 2 MM, PLASTIC, MO-229WECD-1, DFN-8
文件頁數(shù): 4/16頁
文件大?。?/td> 264K
代理商: LTC2927CDDB#TRM
LTC2927
12
2927fb
Figure 15. Supply Sequencing (from Figure 16)
Figure 16. Supply Sequencing Example
1V/DIV
10ms/DIV
MASTER
SLAVE1
SLAVE2
2927 F15
10ms/DIV
1V/DIV
MASTER
3.3V
RONB
138k
RONA
100k
ON
RAMP
SLAVE1
1.8V
VCC
3.3V
EARLY VIN
3.3V
LTC2927
GND
SDO
RUN/SS
FB
IN
DC/DC
FB = 1.235V
OUT
RAMPBUF
TRACK
0.1μF
RTB1
1.65k
RFB1
16.5k
RFA1
35.7k
RTA1
3.48k
ON
RAMP
SLAVE2
2.5V
2927 F16
VCC
3.3V
EARLY
3.3V
LTC2927
GND
SDO
RUN/SS
FB
IN
DC/DC
FB = 0.8V
OUT
RAMPBUF
TRACK
0.1μF
RTB2
88.7k
RFB2
887k
RFA2
412k
RTA2
36.5k
In Figure 15, the slave 1 supply and the slave 2 supply are
sequenced instead of tracking. The 3.3V master ramps up
at 100V/s. The 1.8V slave 1 supply ramps up at 1000V/s
beginning 10ms after the master signal starts to ramp up.
The 2.5V slave 2 supply ramps up at 1000V/s beginning
25ms after the master signal begins to ramp up. Note
that not every combination of ramp rates and delays is
possible. Small delays and large ratios of slave ramp rate
to master ramp rate may result in solutions that require
negative resistors. In such cases, either the delay must
be increased or the ratio of slave ramp rate to master
ramp rate must be reduced. In this example, solving for
the slave supply yields:
1. Set the ramp rate of the master signal.
From Equation 1:
C
A
Vs
F
RAMP
==
μ
10
100
01
μ
/
.
2. Solve for the pair of resistors that provide the desired
slave supply behavior, assuming no delay.
Rk
Vs
k
TB
=
16 5
100
1000
165
.
/
.
ΩΩ
From Equation 3:
R
V
k
V
k
V
k
TA
′ =
+
=
08
1 235
16 5
1 235
35 7
08
165
213
.
ΩΩ
Ω
3. Choose RTA to obtain desired delay.
From Equation 4:
R
Vk
ms
V s
k
TA
″ =
=
08
165
10
100
132
..
/
.
Ω
From Equation 5:
Rk
k
TA
=
213
1 32
348
..
.
ΩΩ
Ω
Supply Sequencing Example
APPLICATIO S I FOR ATIO
WU
U
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