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參數(shù)資料
| 型號(hào)： | LTC2631ITS8-LM10#TRMPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 3.8 us SETTLING TIME, 10-BIT DAC, PDSO8 |
| 封裝： | LEAD FREE, PLASTIC, MO-193, TSOT-23, 8 PIN |
| 文件頁數(shù)： | 3/28頁 |
| 文件大?。?/td> | 349K |
| 代理商： | LTC2631ITS8-LM10#TRMPBF |
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LTC2631
11
2631fa
TIMING CHARACTERISTICS The l denotes the specications which apply over the full operating temperature
range, otherwise specications are at TA = 25°C. VCC = 4.5V to 5.5V. (See Figure 1) (Note 13).
LTC2631-HM12/-HM10/-HM8/-HZ12/-HZ10/-HZ8, LTC2631A-HM12/-HZ12 (VFS = 4.096V)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fSCL
SCL Clock Frequency
l
0
400
kHz
tHD(STA)
Hold Time (Repeated) Start Condition
l
0.6
μs
tLOW
Low Period of the SCL Clock Pin
l
1.3
μs
tHIGH
High Period of the SCL Clock Pin
l
0.6
μs
tSU(STA)
Set-Up Time for a Repeated Start Condition
l
0.6
μs
tHD(DAT)
Data Hold Time
l
0
0.9
μs
tSU(DAT)
Data Set-Up Time
l
100
ns
tr
Rise Time of Both SDA and SCL Signals
(Note 12)
l 20 + 0.1CB
300
ns
tf
Fall Time of Both SDA and SCL Signals
(Note 12)
l 20 + 0.1CB
300
ns
tSU(STO)
Set-Up Time for Stop Condition
l
0.6
μs
tBUF
Bus Free Time Between a Stop and Start Condition
l
1.3
μs
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltages are with respect to GND.
Note 3: High temperatures degrade operating lifetimes. Operating lifetime
is derated at temperatures greater than 105°C.
Note 4: Linearity and monotonicity are dened from code kL to code
2N – 1, where N is the resolution and kL is given by kL = 0.016 (2N/ VFS),
rounded to the nearest whole code. For VFS = 2.5V and N = 12, kL = 26 and
linearity is dened from code 26 to code 4,095. For VFS = 4.096V and
N = 12, kL = 16 and linearity is dened from code 16 to code 4,095.
Note 5: Inferred from measurement at code 16 (LTC2631-12), code 4
(LTC2631-10) or code 1 (LTC2631-8), and at full scale.
Note 6: This IC includes current limiting that is intended to protect the
device during momentary overload conditions. Junction temperature can
exceed the rated maximum during current limiting. Continuous operation
above the specied maximum operating junction temperature may impair
device reliability.
Note 7: Digital inputs at 0V or VCC.
Note 8: Guaranteed by design and not production tested.
Note 9: Internal Reference mode. DAC is stepped 1/4 scale to 3/4 scale
and 3/4 scale to 1/4 scale. Load is 2kΩ in parallel with 100pF to GND.
Note 10: Temperature coefcient is calculated by dividing the maximum
change in output voltage by the specied temperature range.
Note 11: Maximum VIH = VCC(MAX) + 0.5V
Note 12: CB = capacitance of one bus line in pF
Note 13: All values refer to VIH = VIH(MIN) and VIL = VIL(MAX) levels.
Note 14: Minimum VIL exceeds the Absolute Maximum rating. This
condition won’t damage the IC, but could degrade performance.
Note 15: Full-scale error is determined using the reference voltage
measured at the REF pin.
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