CA0 (Pin 1): Chip Address Bit 0. Tie this pin to VCC" />
參數(shù)資料
型號: LTC2627CDE-1#TRPBF
廠商: Linear Technology
文件頁數(shù): 2/20頁
文件大小: 0K
描述: IC DAC 12BIT R-R I2C 12-DFN
標(biāo)準(zhǔn)包裝: 2,500
設(shè)置時間: 7µs
位數(shù): 12
數(shù)據(jù)接口: I²C
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 780µW
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 12-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 12-DFN(4x3)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): *
LTC2607/LTC2617/LTC2627
0
26071727fa
pin Functions
CA0 (Pin 1): Chip Address Bit 0. Tie this pin to VCC, GND
or leave it floating to select an I2C slave address for the
part (Table 1).
CA1 (Pin 2): Chip Address Bit 1. Tie this pin to VCC, GND
or leave it floating to select an I2C slave address for the
part (Table 1).
LDAC (Pin 3): Asynchronous DAC Update. A falling edge
of this input after four bytes have been written into the part
immediately updates the DAC register with the contents of
the input register. A low on this input without a complete
32-bit (four bytes including the slave address) data write
transfer to the part wakes up sleeping DACs without up-
dating the DAC output. Software power-down is disabled
when LDAC is low. LDAC is disabled when tied high.
SCL (Pin 4): Serial Clock Input Pin. Data is shifted into
the SDA pin at the rising edges of the clock. This high
impedance pin requires a pull-up resistor or current
source to VCC.
SDA (Pin 5): Serial Data Bidirectional Pin. Data is shifted
into the SDA pin and acknowledged by the SDA pin. This
pin is high impedance while data is shifted in and an open-
drainN-channeloutputduringacknowledgment.Requires
a pull-up resistor or current source to VCC.
CA2 (Pin 6): Chip Address Bit 2. Tie this pin to VCC, GND
or leave it floating to select an I2C slave address for the
part (Table 1).
VOUTB (Pin 7): DAC Analog Voltage Output. The output
range is VREFLO to VREF.
VCC (Pin 8): Supply Voltage Input. 2.7V ≤ VCC ≤ 5.5V.
REF (Pin 9): Reference Voltage Input. The input range
is VREFLO ≤ VREF ≤ VCC.
GND (Pin 10): Analog Ground.
REFLO (Pin 11): Reference Low. The voltage at this pin
sets the zero scale (ZS) voltage of all DACs. The VREFLOpin
can be used at voltages up to 1V for VCC = 5V, or 100mV
for VCC = 3V.
VOUTA (Pin 12): DAC Analog Voltage Output. The output
range is VREFLO to VREF.
Exposed Pad (Pin 13): Ground. Must be soldered to
PCB ground.
Short-Circuit Output Current vs
VOUT (Sinking)
Short-Circuit Output Current vs
VOUT (Sourcing)
1V/DIV
0
10mA/DIV
10
20
30
40
50
1
2
3
4
2607 G32
5
6
VCC = 5.5V
VREF = 5.6V
CODE = 0
VOUT SWEPT 0V TO VCC
1V/DIV
0
–50
10mA/DIV
–40
–30
–20
–10
0
1
2
3
4
2607 G33
5
6
VCC = 5.5V
VREF = 5.6V
CODE = FULL SCALE
VOUT SWEPT VCC TO 0V
LTC2607/LTC2617/LTC2627
typical perFormance characteristics
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