參數(shù)資料
型號(hào)： LTC2492CDE
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 4-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO14
封裝： 4 X 3 MM, PLASTIC, MO-229WGED-3, QFN-14
文件頁數(shù)： 10/36頁
文件大?。?/td> 652K
代理商： LTC2492CDE
LTC2492
2492fa
applicaTions inFormaTion
conversion automatically begins at power up using this
default configuration. Once the conversion is complete,
a new word may be written into the device.
The first three bits shifted into the device consist of two
preamble bits and an enable bit. These bits are used to
enable the device configuration and input channel selec-
tion. Valid settings for these three bits are 000, 100 and
101. Other combinations should be avoided. If the first
three bits are 000 or 100, the following data is ignored
(don’t care) and the previously selected input channel and
configuration remain valid for the next conversion.
If the first three bits shifted into the device are 101, then
the next five bits select the input channel for the next
conversion cycle (see Table 3).
The first input bit (SGL) following the 101 sequence de-
termines if the input selection is differential (SGL = 0) or
single-ended (SGL = 1). For SGL = 0, two adjacent chan-
nels can be selected to form a differential input. For SGL
= 1, one of four channels is selected as the positive input.
The negative input is COM for all single ended operations.
The remaining four bits (ODD, A2, A1, A0) determine
which channel(s) is/are selected and the polarity (for a
differential input).
The next serial input bit immediately following the input
channel selection is the enable bit for the conversion
configuration (EN2). If this bit is set to 0, then the next
conversion is performed using the previously selected
converter configuration.
A new configuration can be loaded into the device by
setting EN2 = 1 (see Table 4). The first bit (IM) is used
to select the internal temperature sensor. If IM = 1, the
following conversion will be performed on the internal
temperaturesensorratherthantheselectedinputchannel.
The next two bits (FA and FB) are used to set the rejection
frequency. The final bit (SPD) is used to select either the
1x output rate if SPD = 0 (auto-calibration is enabled and
the offset is continuously calibrated and removed from
the final conversion result) or the 2x output rate if SPD
= 1 (offset calibration disabled, multiplexing output rates
up to 15Hz with no latency). When IM = 1 (temperature
measurement) SPD will be ignored and the device will
operate in 1x mode. The configuration remains valid until
Table 3 Channel Selection
MUX ADDRESS
CHANNEL SELECTION
SGL
ODD/
SIGN
A2
A1
A0
0
1
2
3
COM
*0
0
IN+
IN–
0
1
IN+
IN–
0
1
0
IN–
IN+
0
1
0
1
IN–
IN+
1
0
IN+
IN–
1
0
1
IN+
IN–
1
0
IN+
IN–
1
0
1
IN+
IN–
*Default at power up
Table 2. Output Data Format
Differential Input Voltage
VIN*
Bit 31
`E`O`C
Bit 30
DMY
Bit 29
SIG
Bit 28
MSB
Bit 27
Bit 26
Bit 25
…
Bit 5
LSB
Bits 4 to 0
SUB LSBs
VIN* ≥ 0.5 VREF**
0
1
0
…
0
00000
0.5 VREF** – 1LSB
0
1
0
1
…
1
XXXXX
0.25 VREF**
0
1
0
1
0
…
0
XXXXX
0.25 VREF** – 1LSB
0
1
0
1
…
1
XXXXX
0
1
0
…
0
XXXXX
–1LSB
0
1
…
1
XXXXX
–0.25 VREF**
0
1
0
…
0
XXXXX
–0.25 VREF** – 1LSB
0
1
0
1
…
1
XXXXX
–0.5 VREF**
0
1
0
…
0
XXXXX
VIN* < –0.5 VREF**
0
1
…
1
11111
*The differential input voltage VIN = IN+ – IN–. **The differential reference voltage VREF = REF+ – REF–.
** Sub LSBs are below the 24-bit level. They may be included in averaging, or discarded without loss of resolution.
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