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參數資料
| 型號： | LTC2489IDEPBF |
| 廠商： | Linear Technology Corporation |
| 英文描述： | 16-Bit 2-/4-Channel ADC with Easy Drive Input Current Cancellation and I2C Interface |
| 中文描述： | 16位2-/4-Channel ADC，具有易于驅動的輸入電流取消和I2C接口 |
| 文件頁數： | 12/24頁 |
| 文件大小： | 341K |
| 代理商： | LTC2489IDEPBF |
LTC2489
12
2489f
result in binary two’s complement format. The remaining
six bits are always 0.
As long as the voltage on the selected input channels (IN
+
and IN
–
) remains between –0.3V and V
CC
+ 0.3V (absolute
maximum operating range) a conversion result is gener-
ated for any differential input voltage V
IN
from –FS = –0.5
V
REF
to +FS = 0.5 V
REF
. For differential input voltages
greater than +FS, the conversion result is clamped to the
value corresponding to +FS. For differential input voltages
below –FS, the conversion result is clamped to the value
–FS – 1LSB.
Table 2. LTC2489 Status Bits
Input Range
V
IN
≥ FS
0V ≤ V
IN
< FS
–FS ≤ V
IN
< 0V
V
IN
< –FS
Bit 23
SIG
1
1
0
0
Bit 22
MSB
1
0
1
0
INPUT DATA FORMAT
The LTC2489 serial input is 8 bits long and is written into
the device in one 8-bit word. SGL, ODD, A2, A1, A0 are
used to select the input channel.
After power-up, the device initiates an internal reset cycle
which sets the input channel to CH0-CH1 (IN
+
= CH0,
IN
–
= CH1). The first conversion automatically begins
at power-up using this default input channel. Once the
Table 1. Output Data Format
Differential Input Voltage
V
IN
*
V
IN
* ≥ FS**
FS** – 1LSB
0.5 FS**
0.5 FS** – 1LSB
0
–1LSB
–0.5 FS**
–0.5 FS** – 1LSB
–FS**
V
IN
* < –FS**
*The differential input voltage V
IN
= IN
+
– IN
–
. **The full-scale voltage FS = 0.5 V
REF
.
Bit 23
SIG
1
1
1
1
1
0
0
0
0
0
Bit 22
MSB
1
0
0
0
0
1
1
1
1
0
Bit 21
0
1
1
0
0
1
1
0
0
1
Bit 20
0
1
0
1
0
1
0
1
0
1
Bit 19
…
Bit 6
LSB
0
1
0
1
0
1
0
1
0
1
Bits 5-0
Always 0
000000
000000
000000
000000
000000
000000
000000
000000
000000
000000
0
1
0
1
0
1
0
1
0
1
…
…
…
…
…
…
…
…
…
…
conversion is complete, a new channel may be written
into the device.
The first three bits of the input word consist of two pre-
amble bits and one enable bit. These three bits are used
to enable the input channel selection. Valid settings for
these three bits are 000, 100, and 101. Other combinations
should be avoided.
If the first three bits are 000 or 100, the following data
is ignored (don’t care) and the previously selected input
channel remains valid for the next conversion.
If the first three bits shifted into the device are 101, then
the next five bits select the input channel for the next
conversion cycle (see Table 3).
APPLICATIONS INFORMATION
Table 3 Channel Selection
MUX ADDRESS
ODD/
SIGN
*0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
CHANNEL SELECTION
SGL
A2
0
0
0
0
0
0
0
0
A1
0
0
0
0
0
0
0
0
A0
0
1
0
1
0
1
0
1
0
1
2
3
COM
IN
+
IN
–
IN
+
IN
–
IN
–
IN
+
IN
–
IN
+
IN
+
IN
–
IN
–
IN
–
IN
–
IN
+
IN
+
IN
+
*Default at power up
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