參數(shù)資料
型號(hào)： LTC2486IDE#TR
廠(chǎng)商： LINEAR TECHNOLOGY CORP
元件分類(lèi)： ADC
英文描述： 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC14
封裝： 4 X 3 MM, PLASTIC, MO-229WGED-3, QFN-14
文件頁(yè)數(shù)： 32/36頁(yè)
文件大?。?/td> 659K
代理商： LTC2486IDE#TR
LTC2486
2486fa
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
fEOSC
External Oscillator Frequency Range
(Note 16)
●
10
4000
kHz
tHEO
External Oscillator High Period
●
0.125
50
s
tLEO
External Oscillator Low Period
●
0.125
50
s
tCONV_1
Conversion Time for 1x Speed Mode
50Hz Mode
60Hz Mode
Simultaneous 50/60Hz Mode
External Oscillator
●
157.2
131
144.1
160.3
133.6
146.9
41036/fEOSC (in kHz)
163.5
136.3
149.9
ms
tCONV_2
Conversion Time for 2x Speed Mode
50Hz Mode
60Hz Mode
Simultaneous 50/60Hz Mode
External Oscillator
●
78.7
65.6
72.2
80.3
66.9
73.6
20556/fEOSC (in kHz)
81.9
68.2
75.1
ms
fISCk
Internal SCk Frequency
Internal Oscillator (Notes 10, 17)
External Oscillator (Notes 10, 11, 15)
38.4
fEOSC/8
kHz
DISCk
Internal SCk Duty Cycle
(Notes 10, 17)
●
45
55
%
fESCk
External SCk Frequency Range
(Notes 10, 11, 15)
●
4000
kHz
tLESCk
External SCk Low Period
(Notes 10, 11, 15)
●
125
ns
tHESCk
External SCk High Period
(Notes 10, 11, 15)
●
125
ns
tDOUT_ISCk
Internal SCk 24-Bit Data Output Time
Internal Oscillator (Notes 10, 17)
External Oscillator (Notes 10, 11, 15)
●
0.61
0.625
192/fEOSC (in kHz)
0.64
ms
tDOUT_ESCk External SCk 24-Bit Data Output Time
(Notes 10, 11, 15)
24/fESCk (in kHz)
ms
t1
CS
↓ to SDO Low
●
0
200
ns
t2
CS
↑ to SDO High Z
●
0
200
ns
t3
CS
↓ to SCk↓
Internal SCk Mode
●
0
200
ns
t4
CS
↓ to SCk↑
External SCk Mode
●
50
ns
tkQMAX
SCk
↓ to SDO Valid
●
200
ns
tkQMIN
SDO Hold After SCk
↓
(Note 5)
●
15
ns
t5
SCk Set-Up Before CS
↓
●
50
ns
t7
SDI Setup Before SCk
↑
(Note 5)
●
100
ns
t8
SDI Hold After SCk
↑
(Note 5)
●
100
ns
DigiTal inpuTs anD DigiTal ouTpuTs The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND.
Note 3: Unless otherwise specified:
VCC = 2.7V to 5.5V
VREFCM = VREF/2, FS = 0.5VREF/Gain
VIN = IN+ – IN–, VIN(CM) = (IN+ – IN–)/2,
where IN+ and IN– are the selected input channels.
Note 4: Use internal conversion clock or external conversion clock source
with fEOSC = 307.2kHz unless other wise specified.
Note 5: Guaranteed by design, not subject to test.
Note 6: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7: 50Hz mode (internal oscillator) or fEOSC = 256kHz ±2% (external
oscillator).
Note 8: 60Hz mode (internal oscillator) or fEOSC = 307.2kHz ±2% (external
oscillator).
Note 9: Simultaneous 50Hz/60Hz mode (internal oscillator) or fEOSC =
280kHz ±2% (external oscillator).
Note 10: The SCk can be configured in external SCk mode or internal SCk
mode. In external SCk mode, the SCk pin is used as a digital input and the
driving clock is fESCk. In the internal SCk mode, the SCk pin is used as a
digital output and the output clock signal during the data output is fISCk.
Note 11: The external oscillator is connected to the FO pin. The external
oscillator frequency, fEOSC, is expressed in kHz.
Note 12: The converter uses its internal oscillator.
Note 13: The output noise includes the contribution of the internal
calibration operations.
Note 14: Guaranteed by design and test correlation.
Note 15: The converter is in external SCk mode of operation such that the
SCk pin is used as a digital input. The frequency of the clock signal driving
SCk during the data output is fESCk and is expressed in Hz.
Note 16: Refer to Applications Information section for performance vs
data rate graphs.
Note 17: The converter in internal SCk mode of operation such that the
SCk pin is used as a digital output.
相關(guān)PDF資料
PDF描述
LTC2486CDE#TR 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC14
LTC2488CDE 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC14
LTC2488IDE#TR 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC14
LTC2488CDE#TR 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC14
LTC2488IDE 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQCC14
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