參數(shù)資料
型號： LTC2480CDD#PBF
廠商： Linear Technology
文件頁數(shù)： 28/42頁
文件大?。?/td> 0K
描述： IC ADC 16BIT 10-DFN
標準包裝： 121
位數(shù)： 16
采樣率（每秒）： 7.5
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 10-WFDFN 裸露焊盤
供應商設備封裝： 10-DFN（3x3）
包裝： 管件
輸入數(shù)目和類型： 2 個單端，雙極；1 個差分，雙極
產(chǎn)品目錄頁面： 1348 (CN2011-ZH PDF)
配用： DC798B-ND - BOARD DELTA SIGMA ADC LTC2480
LTC2480
2480fd
applicaTions inForMaTion
second, the user is advised to maximize the power supply
voltage used and to limit the maximum ambient operating
temperature. In certain circumstances, a reduction of the
differential reference voltage may be beneficial.
Input Bandwidth
The combined effect of the internal SINC4 digital filter and
oftheanaloganddigitalautocalibrationcircuitsdetermines
the LTC2480 input bandwidth. When the internal oscillator
isusedwiththenotchsetat60Hz,the3dBinputbandwidth
is 3.63Hz. When the internal oscillator is used with the
notch set at 50Hz, the 3dB input bandwidth is 3.02Hz.
If an external conversion clock generator of frequency
fEOSC is connected to the fO pin, the 3dB input bandwidth
is 11.8 10–6 fEOSC.
Due to the complex filtering and calibration algorithms
utilized, the converter input bandwidth is not modeled
very accurately by a first order filter with the pole located
at the 3dB frequency. When the internal oscillator is used,
the shape of the LTC2480 input bandwidth is shown in
Figure 28. When an external oscillator of frequency fEOSC
is used, the shape of the LTC2480 input bandwidth can
be derived from Figure 28, 60Hz mode curve in which the
horizontal axis is scaled by fEOSC/307200.
The conversion noise (600nVRMS typical for VREF = 5V)
can be modeled by a white noise source connected to a
noisefreeconverter.Thenoisespectraldensityis47nV√Hz
for an infinite bandwidth source and 64nV√Hz for a single
0.5MHz pole source. From these numbers, it is clear that
particular attention must be given to the design of external
amplification circuits. Such circuits face the simultaneous
requirements of very low bandwidth (just a few Hz) in
order to reduce the output referred noise and relatively
high bandwidth (at least 500kHz) necessary to drive the
input switched-capacitor network. A possible solution is
a high gain, low bandwidth amplifier stage followed by a
high bandwidth unity-gain buffer.
When external amplifiers are driving the LTC2480, the
ADC input referred system noise calculation can be
simplified by Figure 29. The noise of an amplifier driving
the LTC2480 input pin can be modeled as a band limited
white noise source. Its bandwidth can be approximated
by the bandwidth of a single pole lowpass filter with a
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0
INPUT
SIGNAL
ATTENUATION
(dB)
–3
–2
–1
0
4
2480 F28
–4
–5
–6
1
2
3
5
50Hz MODE
60Hz MODE
50Hz AND
60Hz MODE
Figure 28. Input Signal Bandwidth Using the Internal Oscillator
INPUT NOISE SOURCE SINGLE POLE
EQUIVALENT BANDWIDTH (Hz)
1
INPUT
REFERRED
NOISE
EQUIVALENT
BANDWIDTH
(Hz)
10
0.1
1
10
100
1k
10k 100k 1M
2480 F29
0.1
100
50Hz MODE
60Hz MODE
Figure 29. Input Referred Noise Equivalent Bandwidth
of an Input Connected White Noise Source
corner frequency fi. The amplifier noise spectral density
is ni. From Figure 29, using fi as the x-axis selector, we
can find on the y-axis the noise equivalent bandwidth freqi
of the input driving amplifier. This bandwidth includes
the band limiting effects of the ADC internal calibration
and filtering. The noise of the driving amplifier referred
to the converter input and including all these effects can
be calculated as N = ni √freqi. The total system noise
(referred to the LTC2480 input) can now be obtained by
summing as square root of sum of squares the three ADC
input referred noise sources: the LTC2480 internal noise,
the noise of the IN+ driving amplifier and the noise of the
IN– driving amplifier.
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