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參數(shù)資料
| 型號： | LTC2453CDDB#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT DELTA SIG 8-DFN |
| 標準包裝： | 2,500 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 60 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 4mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 8-DFN（3x2） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
| 配用： | DC1266A-A-ND - BOARD DELTA SIGMA ADC LTC2453 |
LTC2453
13
2453fc
INPUT SIGNAL FREQUENCY (MHz)
0
INPUT
SIGNAL
A
TTENUA
TION
(dB)
–40
0
1.00
1.25
1.50
2453 F12
–60
–80
–20
–100
2.5
5.0
7.5
INPUT SIGNAL FREQUENCY (Hz)
0
INPUT
SIGNAL
A
TTENUA
TIOIN
(dB)
–20
–10
0
480
2453 F13
–30
–40
–25
–15
–5
–35
–45
–50
120
60
240
180
360 420
540
300
600
Figure 12. LTC2453 Input Signal Attentuation vs Frequency
Figure 13. LTC2453 Input Signal Attenuation
vs Frequency (Low Frequencies)
These considerations need to be balanced out by the input
signal bandwidth. The 3dB bandwidth ≈ 1/(2
pRSCIN).
Finally, if the recommended choice for CIN is unacceptable
for the user’s specific application, an alternate strategy is
to eliminate CIN and minimize CPAR and RS. In practical
terms, this configuration corresponds to a low impedance
sensor directly connected to the ADC through minimum
lengthtraces.Actualapplicationsincludecurrentmeasure-
ments through low value sense resistors, temperature
measurements,lowimpedancevoltagesourcemonitoring,
and so on. The resultant INL vs VIN is shown in Figure 11.
The measurements of Figure 11 include a capacitor CPAR
corresponding to a minimum sized layout pad and a mini-
mum width input trace of about 1 inch length.
Signal Bandwidth, Transition Noise and Noise
Equivalent Input Bandwidth
TheLTC2453includesasinc1typedigitalfilterwiththefirst
notch located at f0 = 60Hz. As such, the 3dB input signal
bandwidthis26.54Hz.ThecalculatedLTC2453inputsignal
attenuation vs frequency over a wide frequency range is
shown in Figure 12. The calculated LTC2453 input signal
attenuation vs frequency at low frequencies is shown in
Figure 13. The converter noise level is about 1.4VRMS
and can be modeled by a white noise source connected
at the input of a noise-free converter.
On a related note, the LTC2453 uses two separate A/D
converterstodigitizethepositiveandnegativeinputs. Each
of these A/D converters has 1.4VRMS transition noise.
If one of the input voltages is within this small transition
noise band, then the output will fluctuate one bit, regard-
less of the value of the other input voltage. If both of the
input voltages are within their transition noise bands, the
output can fluctuate 2 bits.
Forasimplesystemnoiseanalysis,theVINdrivecircuitcan
be modeled as a single-pole equivalent circuit character-
ized by a pole location fi and a noise spectral density ni.
If the converter has an unlimited bandwidth, or at least a
bandwidth substantially larger than fi, then the total noise
contribution of the external drive circuit would be:
Vn = ni p / 2 fi
Then, the total system noise level can be estimated as
the square root of the sum of (Vn2) and the square of the
LTC2453 noise floor (~1.4V2).
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