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參數資料
| 型號： | LTC2451ITSB#TRMPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | ADC |
| 英文描述： | 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO8 |
| 封裝： | LEAD FREE, PLASTIC, MO-193, TSOT-23, 8 PIN |
| 文件頁數： | 5/18頁 |
| 文件大?。?/td> | 245K |
| 代理商： | LTC2451ITSB#TRMPBF |
LTC2451
13
2451ff
Figure 11. LTC2451 Input Drive Equivalent Circuit
2. The bandwidth from VSIG is reduced at the input pin.
This bandwidth reduction isolates the ADC from high
frequency signals, and as such provides simple anti-
aliasing and input noise reduction.
3. Switching transients generated by the ADC are attenu-
ated before they go back to the signal source.
4. A large CIN gives a better AC ground at the input pin,
helping reduce reections back to the signal source.
5. Increasing RS protects the ADC by limiting the current
during an outside-the-rails fault condition.
There is a limit to how large RS CIN should be for a given
application. Increasing RS beyond a given point increases
the voltage drop across RS due to the input current,
to the point that signicant measurement errors exist.
Additionally, for some applications, increasing the RS CIN
product too much may unacceptably attenuate the signal
at frequencies of interest.
For most applications, it is desirable to implement CIN as
a high quality 0.1μF ceramic capacitor and RS ≤ 1k. This
capacitor should be located as close as possible to the
input pin. Furthermore, the area encompassed by this circuit
path, as well as the path length, should be minimized.
Figure 12. Measured INL vs Input Voltage,
CIN = 0.1μF, VCC = 5V, TA = 25°C
In the case of a 2-wire sensor that is not remotely
grounded, it is desirable to split RS and place series
resistors in the ADC input line and in the sensor ground
return line, which should be tied to the ADC GND pin using
a star connection topology.
Figure 12 shows the measured LTC2451 INL versus the
input voltage as a function of RS value with an input
capacitor CIN = 0.1μF.
In some cases, RScanbeincreasedabovetheseguidelines.
The input current is negligible when the ADC is either in
sleep or I/O modes. Thus, if the time constant of the input
RC circuit τ = RS CIN, is of the same order of magnitude or
longer than the time periods between actual conversions,
then one can consider the input current to be reduced
correspondingly.
These considerations need to be balanced out by the input
signal bandwidth. The 3dB bandwidth ≈ 1/(2πRSCIN).
Finally, if the recommended choice for CIN is unacceptable
for the user’s specic application, an alternate strategy is to
eliminate CIN and minimize CPAR and RS. In practical terms,
this conguration corresponds to a low impedance sensor
directly connected to the ADC through minimum length
Figure 13. Measured INL vs Input Voltage,
CIN = 0, VCC = 5V, TA = 25°C
APPLICATIONS INFORMATION
INPUT VOLTAGE (V)
0
INL(LSB)
–4
0
4
3
5
2451 F12
–8
–12
–16
12
4
8
12
16
RS = 10k
RS = 1k
RS = 0
INPUT VOLTAGE (V)
0
INL
(LSB)
8
6
4
2
0
–2
–4
–6
–8
4
2451 F13
123
5
3.5
0.5
1.5
2.5
4.5
RS = 1k
RS = 10k
RS = 0
VSIG
2451 F11
ILEAK
RSW
15k
(TYP)
ICONV
CIN
IN
VCC
RS
CEQ
0.35pF
(TYP)
CPAR
+
–
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