參數(shù)資料
型號(hào)： LTC2435-1CGN
廠(chǎng)商： LINEAR TECHNOLOGY CORP
元件分類(lèi)： ADC
英文描述： 20-Bit No Latency ADCs with Differential Input and Differential Reference
中文描述： 1-CH 20-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16
封裝： 0.150 INCH, PLASTIC, SSOP-16
文件頁(yè)數(shù)： 13/40頁(yè)
文件大?。?/td> 463K
代理商： LTC2435-1CGN
LTC2435/LTC2435-1
13
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APPLICATIU
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The LTC2435/LTC2435-1 perform a full-scale calibration
every conversion cycle. This calibration is transparent to
the user and has no effect on the cyclic operation de-
scribed above. The advantage of continuous calibration is
extreme stability of full-scale readings with respect to time,
supply voltage change and temperature drift.
Unlike the LTC2430, the LTC2435 and LTC2435-1 do not
perform an offset calibration every conversion cycle. This
enables the LTC2435/LTC2435-1 to double their output
rate while maintaining line frequency rejection. The initial
offset of the LTC2435/LTC2435-1 is within 5mV indepen-
dent of V
REF
. Based on the LTC2435/LTC2435-1 new modu-
lator architecture, the temperature drift of the offset is less
than 100nV/
°
C. More information on the LTC2435/
LTC2435-1 offset is described in the Offset Accuracy and
Drift section of this data sheet.
Power-Up Sequence
The LTC2435/LTC2435-1 automatically enter an internal
reset state when the power supply voltage V
CC
drops
below approximately 2.2V. This feature guarantees the
integrity of the conversion result and of the serial interface
mode selection. (See the 2-wire I/O sections in the Serial
Interface Timing Modes section.)
When the V
CC
voltage rises above this critical threshold,
the converter creates an internal power-on-reset (POR)
signal with a duration of approximately 1ms. The POR
signal clears all internal registers. Following the POR
signal, the LTC2435/LTC2435-1 start a normal conversion
cycle and follow the succession of states described above.
The first conversion result following POR is accurate
within the specifications of the device if the power supply
voltage is restored within the operating range (2.7V to
5.5V) before the end of the POR time interval.
Reference Voltage Range
These converters accept a truly differential external refer-
ence voltage. The absolute/common mode voltage speci-
fication for the REF
+
and REF
–
pins covers the entire range
from GND to V
CC
. For correct converter operation, the
REF
+
pin must always be more positive than the REF
–
pin.
The LTC2435/LTC2435-1 can accept a differential refer-
ence voltage from 0.1V to V
CC
. The converter output noise
is determined by the thermal noise of the front-end cir-
cuits, and as such, its value is nearly constant with
reference voltage. A decrease in reference voltage will not
significantly improve the converter’s effective resolution.
On the other hand, a reduced reference voltage will im-
prove the converter’s overall INL performance. A reduced
reference voltage will also improve the converter perfor-
mance when operated with an external conversion clock
(external F
O
signal) at substantially higher output data
rates (see the Output Data Rate section).
Input Voltage Range
The analog input is truly differential with an absolute/
common mode range for the IN
+
and IN
–
input pins
extending from GND – 0.3V to V
CC
+ 0.3V. Outside
these limits, the ESD protection devices begin to turn on
and the errors due to input leakage current increase
rapidly. Within these limits, the LTC2435/LTC2435-1 con-
vert the bipolar differential input signal, V
IN
= IN
+
– IN
–
,
from –FS = –0.5 V
REF
to +FS = 0.5 V
REF
where V
REF
=
REF
+
– REF
–
. Outside this range, the converters indicate
the overrange or the underrange condition using distinct
output codes.
Input signals applied to IN
+
and IN
–
pins may extend by
300mV below ground and above V
CC
. In order to limit any
fault current, resistors of up to 5k may be added in series
with the IN
+
and IN
–
pins without affecting the perfor-
mance of the device. In the physical layout, it is important
to maintain the parasitic capacitance of the connection
between these series resistors and the corresponding pins
as low as possible; therefore, the resistors should be
located as close as practical to the pins. The effect of the
series resistance on the converter accuracy can be evalu-
ated from the curves presented in the Input Current/
Reference Current sections. In addition, series resistors
will introduce a temperature dependent offset error due to
the input leakage current. A 1nA input leakage current will
develop a 1ppm offset error on a 5k resistor if V
REF
= 5V.
This error has a very strong temperature dependency.
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