Figure 26. Resolution (NoiseRMS ≤ 1LSB) vs Output Da" />
參數(shù)資料
型號： LTC2418CGN#PBF
廠商： Linear Technology
文件頁數(shù)： 26/48頁
文件大?。?/td> 0K
描述： IC ADC 24BIT DIFF INPUT 28SSOP
標(biāo)準(zhǔn)包裝： 49
位數(shù)： 24
采樣率（每秒）： 7.5
數(shù)據(jù)接口： MICROWIRE?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 1mW
電壓電源： 單電源
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 28-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 28-SSOP
包裝： 管件
輸入數(shù)目和類型： 16 個單端，單極；16 個單端，雙極；8 個差分，單極；8 個差分，雙極
產(chǎn)品目錄頁面： 1348 (CN2011-ZH PDF)
配用： DC571A-ND - BOARD DELTA SIGMA ADC LTC2418
LTC2414/LTC2418
32
241418fa
Figure 26. Resolution (NoiseRMS ≤ 1LSB)
vs Output Data Rate and Temperature
Figure 27. Resolution (INLRMS ≤ 1LSB)
vs Output Data Rate and Temperature
Figure 28. Offset Error vs Output
Data Rate and Reference Voltage
Figure 29. Resolution (NoiseRMS ≤ 1LSB) vs
Output Data Rate and Reference Voltage
Figure 30. Resolution (INLMAX ≤ 1LSB) vs
Output Data Rate and Reference Voltage
Figure 31. Input Signal Bandwidth
Using the Internal Oscillator
APPLICATIO S I FOR ATIO
WU
UU
OUTPUT DATA RATE (READINGS/SEC)
0
102030405060708090 100
RESOLUTION
(BITS)
2414/18 F26
24
23
22
21
20
19
18
17
16
15
14
13
12
TA = 85°C
VCC = 5V
REF+ = 5V
REF – = GND
VINCM = 2.5V
VIN = 0V
SDI = GND
FO = EXTERNAL OSCILLATOR
RESOLUTION = LOG2(VREF/NOISERMS)
TA = 25°C
OUTPUT DATA RATE (READINGS/SEC)
0
102030405060708090 100
RESOLUTION
(BITS)
2414/18 F27
22
20
18
16
14
12
10
8
TA = 85°C
VCC = 5V
REF+ = 5V
REF – = GND
VINCM = 2.5V
–2.5V < VIN < 2.5V
SDI = GND
FO = EXTERNAL OSCILLATOR
RESOLUTION = LOG2(VREF/INLMAX)
TA = 25°C
OUTPUT DATA RATE (READINGS/SEC)
200
150
100
50
0
–50
OFFSET
ERROR
(ppm
of
V
REF
)
2414/18 F28
0
102030 40
50 60 70
80 90 100
VREF = 5V
VREF = 2.5V
FO = EXTERNAL OSCILLATOR
VCC = 5V
REF– = GND
VIN = 0V
VINCM = 2.5V
SDI = GND
TA = 25°C
OUTPUT DATA RATE (READINGS/SEC)
0
102030405060708090 100
RESOLUTION
(BITS)
2414/18 F29
24
23
22
21
20
19
18
17
16
15
14
13
12
VREF = 5V
VCC = 5V
REF – = GND
VINCM = 2.5V
VIN = 0V
SDI = GND
FO = EXTERNAL OSCILLATOR
TA = 25°C
RESOLUTION = LOG2(VREF/NOISERMS)
VREF = 2.5V
OUTPUT DATA RATE (READINGS/SEC)
0
102030405060708090 100
RESOLUTION
(BITS)
2414/18 F30
22
20
18
16
14
12
10
8
TA = 25°C
VCC = 5V
REF – = GND
VINCM = 0.5 REF
+
–0.5V VREF < VIN < 0.5 VREF
SDI = GND
FO = EXTERNAL OSCILLATOR
VREF = 2.5V
VREF = 5V
RESOLUTION =
LOG2(VREF/INLMAX)
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
INPUT
SIGNAL
ATTENUATION
(dB)
2414/18 F31
0.0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
–4.0
–4.5
–5.0
–5.5
–6.0
FO = HIGH
FO = LOW
Due to the complex filtering and calibration algorithms
utilized, the converter input bandwidth is not modeled very
accurately by a first order filter with the pole located at the
3dB frequency. When the internal oscillator is used, the
shape of the LTC2414/LTC2418 input bandwidth is shown
in Figure 31 for FO = LOW and FO = HIGH. When an external
oscillator of frequency fEOSC is used, the shape of the
LTC2414/LTC2418 input bandwidth can be derived from
Figure 31, FO = LOW curve in which the horizontal axis is
scaled by fEOSC/153600.
The conversion noise (1
VRMS typical for VREF = 5V) can
be modeled by a white noise source connected to a noise
free converter. The noise spectral density is 78nV/
√Hz for
an infinite bandwidth source and 107nV/
√Hz for a single
0.5MHz pole source. From these numbers, it is clear that
particular attention must be given to the design of external
amplification circuits. Such circuits face the simultaneous
requirements of very low bandwidth (just a few Hz) in
order to reduce the output referred noise and relatively
high bandwidth (at least 500kHz) necessary to drive the
input switched-capacitor network. A possible solution is a
high gain, low bandwidth amplifier stage followed by a
high bandwidth unity-gain buffer.
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